On 05/04/2014 06:36 PM, Aneesh Kumar K.V wrote:
Alexander Graf <agraf@xxxxxxx> writes:
When running on a POWER8 host, we get away with running the guest as POWER7
and nothing falls apart.
However, when we start exposing POWER8 as guest CPU, guests will start using
new abilities on POWER8 which we need to handle.
This patch set does a minimalistic approach to implementing those bits to
make guests happy enough to run.
Alex
Alexander Graf (6):
KVM: PPC: Book3S PR: Ignore PMU SPRs
KVM: PPC: Book3S PR: Emulate TIR register
KVM: PPC: Book3S PR: Handle Facility interrupt and FSCR
KVM: PPC: Book3S PR: Expose TAR facility to guest
KVM: PPC: Book3S PR: Expose EBB registers
KVM: PPC: Book3S PR: Expose TM registers
arch/powerpc/include/asm/kvm_asm.h | 18 ++++---
arch/powerpc/include/asm/kvm_book3s_asm.h | 2 +
arch/powerpc/include/asm/kvm_host.h | 3 ++
arch/powerpc/kernel/asm-offsets.c | 3 ++
arch/powerpc/kvm/book3s.c | 34 +++++++++++++
arch/powerpc/kvm/book3s_emulate.c | 53 ++++++++++++++++++++
arch/powerpc/kvm/book3s_hv.c | 30 -----------
arch/powerpc/kvm/book3s_pr.c | 82 +++++++++++++++++++++++++++++++
arch/powerpc/kvm/book3s_segment.S | 25 ++++++++++
9 files changed, 212 insertions(+), 38 deletions(-)
I did most of this as part of
[RFC PATCH 01/10] KVM: PPC: BOOK3S: PR: Add POWER8 support
http://mid.gmane.org/1390927455-3312-1-git-send-email-aneesh.kumar@xxxxxxxxxxxxxxxxxx
Any reason why that is not picked up ? TM was the reason I didn't push the
patchset again. I was not sure how to get all the TM details to
work.
Ugh, I guess I mostly discarded it as brainstorm patches because they
were marked RFC :(
Alex
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