On 05/01/2014 12:12 AM, Paul Mackerras wrote:
On Tue, Apr 29, 2014 at 06:17:37PM +0200, Alexander Graf wrote:
When we expose a POWER8 CPU into the guest, it will start accessing PMU SPRs
that we don't emulate. Just ignore accesses to them.
Signed-off-by: Alexander Graf <agraf@xxxxxxx>
This patch is OK as it stands, but in fact the architecture says that
kernel accesses to unimplemented SPRs are mostly supposed to be no-ops
rather than causing a trap (mostly == excluding mtspr to 0 or mfspr
from 0, 4, 5 or 6). I have a patch to implement that, which I'll
post.
I think what we want is a flag similar to x86 where we can force ignore
unknown SPRs, but leave it at triggering an interrupt as default. We
usually have to be at least aware of unknown SPRs and check that not
implementing them is ok for the guest.
Debugging a program interrupt because of an unknown SPR is usually a lot
easier than debugging a breaking guest because it was using the SPR as
storage and we didn't back it by anything.
Alex
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