RE: [PATCH 3/4] Watchdog exit handling support

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> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Friday, June 29, 2012 3:57 AM
> To: Bhushan Bharat-R65777
> Cc: qemu-ppc@xxxxxxxxxx; kvm-ppc@xxxxxxxxxxxxxxx; agraf@xxxxxxx; Bhushan Bharat-
> R65777
> Subject: Re: [PATCH 3/4] Watchdog exit handling support
> 
> On 06/28/2012 12:39 AM, Bharat Bhushan wrote:
> > This patch adds the support to handle the exit caused by watchdog
> > (KVM_EXIT_WDT). In the handling we clear the TSR register.
> 
> I'm not sure what the logical split is between this patch and 4/4...

Ok I will merge 3/4 and 4/4.

> 
> > diff --git a/hw/ppc_booke.c b/hw/ppc_booke.c index 837a5b6..a9fba15
> > 100644
> > --- a/hw/ppc_booke.c
> > +++ b/hw/ppc_booke.c
> > @@ -203,6 +203,11 @@ static void booke_wdt_cb(void *opaque)
> >                               booke_timer->wdt_timer);  }
> >
> > +void ppc_booke_wdt_clear_tsr(CPUPPCState *env, target_ulong tsr) {
> > +    env->spr[SPR_BOOKE_TSR] = tsr & ~(TSR_ENW | TSR_WIS |
> > +TSR_WRS_MASK); }
> > +
> 
> We should probably call this function before returning to KVM, at least after we
> halt for debug, possibly other times.

Why clearing watchdog related bits in TSR? This will just reset the watchdog state machine. Do we actually want to reset the state machine or want watchdog interrupt to not occur when exiting to KVM for debug.

Does possibly other times mean except KVM_RUN? 

Thanks
-Bharat

> 
> -Scott
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