Re: [RFC PATCH 13/17] PowerPC: booke64: Use SPRG0/3 scratch for bolted TLB miss & crit int

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On 06/25/2012 07:26 AM, Mihai Caraman wrote:
> Embedded.Hypervisor category defines GSPRG0..3 physical registers for guests.
> Avoid SPRG4-7 usage as scratch in host exception handlers, otherwise guest
> SPRG4-7 registers will be clobbered.
> For bolted TLB miss exception handlers, which is the version currently
> supported by KVM, use SPRN_SPRG_GEN_SCRATCH (aka SPRG0) instead of
> SPRN_SPRG_TLB_SCRATCH (aka SPRG6) and replace TLB with GEN PACA slots to
> keep consitency.
> For critical exception handler use SPRG3 instead of SPRG7.

extlb is in the same cache line as other TLB stuff we need, while exgen
isn't.  Let's stick with extlb.

-Scott

--
To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html


[Index of Archives]     [KVM Development]     [KVM ARM]     [KVM ia64]     [Linux Virtualization]     [Linux USB Devel]     [Linux Video]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [Big List of Linux Books]

  Powered by Linux