On 19.05.2011, at 18:37, Scott Wood wrote:
> On Thu, 19 May 2011 12:43:21 +0200
> Alexander Graf <agraf@xxxxxxx> wrote:
>
>> On 05/18/2011 01:42 AM, Scott Wood wrote:
>>> +void kvmppc_map_magic(struct kvm_vcpu *vcpu)
>>> +{
>>> + struct tlbe magic;
>>> + ulong shared_page = ((ulong)vcpu->arch.shared)& PAGE_MASK;
>>> + pfn_t pfn;
>>> +
>>> + pfn = (pfn_t)virt_to_phys((void *)shared_page)>> PAGE_SHIFT;
>>> + get_page(pfn_to_page(pfn));
>>> +
>>> + magic.mas1 = MAS1_VALID | MAS1_TS |
>>> + MAS1_TSIZE(BOOK3E_PAGESZ_4K);
>>> + magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M;
>>> + magic.mas3 = (pfn<< PAGE_SHIFT) |
>>> + MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR;
>>> + magic.mas7 = pfn>> (32 - PAGE_SHIFT);
>>> +
>>> + __write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index));
>>
>> It's a 4k page, so why use TLB1?
>
> Seemed useful to keep it more or less pinned.
>
>> Also, you add this as PID0 mapping, no?
>> Shouldn't it be restricted to the guest's kernel?
>
> As of this stage in the patchset, we're still dumping the TLB on guest
> privilege switch, and we don't call this function if the guest is in user
> mode.
>
> Later when shadow PIDs are added, we use a shadow PID that corresponds to
> guest kernel mode.
Makes sense :).
Btw - have you considered moving the MAS registers into the shared page now that it's available on BookE? That should give quite a significant performance boost :)
Alex
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