From: Christian Ehrhardt <ehrhardt@xxxxxxxxxxxxxxxxxx>
In kvmppc_deliver_interrupt is just one case left in the switch and it is a
rare one (less than 8%) when looking at the exit numbers. Therefore we can
at least drop the switch/case and if an if. I inserted an unlikely too, but
that's open for discussion.
In kvmppc_can_deliver_interrupt all frequent cases are in the default case.
I know compilers are smart but we can make it easier for them. By writing
down all options and removing the default case combined with the fact that
ithe values are constants 0..15 should allow the compiler to write an easy
jump table.
Modifying kvmppc_can_deliver_interrupt pointed me to the fact that gcc seems
to be unable to reduce priority_exception[x] to a build time constant.
Therefore I changed the usage of the translation arrays in the interrupt
delivery path completely. It is now using priority without translation to irq
on the full irq delivery path.
To be able to do that ivpr regs are stored by their priority now.
Additionally the decision made in kvmppc_can_deliver_interrupt is already
sufficient to get the value of interrupt_msr_mask[x]. Therefore we can replace
the 16x4byte array used here with a single 4byte variable (might still be one
miss, but the chance to find this in cache should be better than the right
entry of the whole array).
Signed-off-by: Christian Ehrhardt <ehrhardt@xxxxxxxxxxxxxxxxxx>
---
[diffstat]
arch/powerpc/kvm/booke_guest.c | 153 ++++++++++++++++-------------------------
arch/powerpc/kvm/emulate.c | 128 +++++++++++++++++++++++++---------
arch/powerpc/kvm/powerpc.c | 5 -
include/asm-powerpc/kvm_ppc.h | 25 +++++-
4 files changed, 180 insertions(+), 131 deletions(-)
[diff]
diff --git a/arch/powerpc/kvm/booke_guest.c b/arch/powerpc/kvm/booke_guest.c
--- a/arch/powerpc/kvm/booke_guest.c
+++ b/arch/powerpc/kvm/booke_guest.c
@@ -53,63 +53,24 @@
{ NULL }
};
-static const u32 interrupt_msr_mask[16] = {
- [BOOKE_INTERRUPT_CRITICAL] = MSR_ME,
- [BOOKE_INTERRUPT_MACHINE_CHECK] = 0,
- [BOOKE_INTERRUPT_DATA_STORAGE] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_INST_STORAGE] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_EXTERNAL] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_ALIGNMENT] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_PROGRAM] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_FP_UNAVAIL] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_SYSCALL] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_AP_UNAVAIL] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_DECREMENTER] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_FIT] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_WATCHDOG] = MSR_ME,
- [BOOKE_INTERRUPT_DTLB_MISS] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_ITLB_MISS] = MSR_CE|MSR_ME|MSR_DE,
- [BOOKE_INTERRUPT_DEBUG] = MSR_ME,
+const unsigned char exception_priority[] = {
+ [BOOKE_INTERRUPT_DATA_STORAGE] = BOOKE_IRQPRIO_DATA_STORAGE,
+ [BOOKE_INTERRUPT_INST_STORAGE] = BOOKE_IRQPRIO_INST_STORAGE,
+ [BOOKE_INTERRUPT_ALIGNMENT] = BOOKE_IRQPRIO_ALIGNMENT,
+ [BOOKE_INTERRUPT_PROGRAM] = BOOKE_IRQPRIO_PROGRAM,
+ [BOOKE_INTERRUPT_FP_UNAVAIL] = BOOKE_IRQPRIO_FP_UNAVAIL,
+ [BOOKE_INTERRUPT_SYSCALL] = BOOKE_IRQPRIO_SYSCALL,
+ [BOOKE_INTERRUPT_AP_UNAVAIL] = BOOKE_IRQPRIO_AP_UNAVAIL,
+ [BOOKE_INTERRUPT_DTLB_MISS] = BOOKE_IRQPRIO_DTLB_MISS,
+ [BOOKE_INTERRUPT_ITLB_MISS] = BOOKE_IRQPRIO_ITLB_MISS,
+ [BOOKE_INTERRUPT_MACHINE_CHECK] = BOOKE_IRQPRIO_MACHINE_CHECK,
+ [BOOKE_INTERRUPT_DEBUG] = BOOKE_IRQPRIO_DEBUG,
+ [BOOKE_INTERRUPT_CRITICAL] = BOOKE_IRQPRIO_CRITICAL,
+ [BOOKE_INTERRUPT_WATCHDOG] = BOOKE_IRQPRIO_WATCHDOG,
+ [BOOKE_INTERRUPT_EXTERNAL] = BOOKE_IRQPRIO_EXTERNAL,
+ [BOOKE_INTERRUPT_FIT] = BOOKE_IRQPRIO_FIT,
+ [BOOKE_INTERRUPT_DECREMENTER] = BOOKE_IRQPRIO_DECREMENTER,
};
-
-const unsigned char exception_priority[] = {
- [BOOKE_INTERRUPT_DATA_STORAGE] = 0,
- [BOOKE_INTERRUPT_INST_STORAGE] = 1,
- [BOOKE_INTERRUPT_ALIGNMENT] = 2,
- [BOOKE_INTERRUPT_PROGRAM] = 3,
- [BOOKE_INTERRUPT_FP_UNAVAIL] = 4,
- [BOOKE_INTERRUPT_SYSCALL] = 5,
- [BOOKE_INTERRUPT_AP_UNAVAIL] = 6,
- [BOOKE_INTERRUPT_DTLB_MISS] = 7,
- [BOOKE_INTERRUPT_ITLB_MISS] = 8,
- [BOOKE_INTERRUPT_MACHINE_CHECK] = 9,
- [BOOKE_INTERRUPT_DEBUG] = 10,
- [BOOKE_INTERRUPT_CRITICAL] = 11,
- [BOOKE_INTERRUPT_WATCHDOG] = 12,
- [BOOKE_INTERRUPT_EXTERNAL] = 13,
- [BOOKE_INTERRUPT_FIT] = 14,
- [BOOKE_INTERRUPT_DECREMENTER] = 15,
-};
-
-const unsigned char priority_exception[] = {
- BOOKE_INTERRUPT_DATA_STORAGE,
- BOOKE_INTERRUPT_INST_STORAGE,
- BOOKE_INTERRUPT_ALIGNMENT,
- BOOKE_INTERRUPT_PROGRAM,
- BOOKE_INTERRUPT_FP_UNAVAIL,
- BOOKE_INTERRUPT_SYSCALL,
- BOOKE_INTERRUPT_AP_UNAVAIL,
- BOOKE_INTERRUPT_DTLB_MISS,
- BOOKE_INTERRUPT_ITLB_MISS,
- BOOKE_INTERRUPT_MACHINE_CHECK,
- BOOKE_INTERRUPT_DEBUG,
- BOOKE_INTERRUPT_CRITICAL,
- BOOKE_INTERRUPT_WATCHDOG,
- BOOKE_INTERRUPT_EXTERNAL,
- BOOKE_INTERRUPT_FIT,
- BOOKE_INTERRUPT_DECREMENTER,
-};
-
void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
{
@@ -158,72 +119,80 @@
}
/* Check if we are ready to deliver the interrupt */
-static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
+static inline int kvmppc_can_deliver_interrupt_by_prio(struct kvm_vcpu *vcpu,
+ unsigned int priority,
+ u32 *mask)
{
- int r;
+ int r = 0;
- switch (interrupt) {
- case BOOKE_INTERRUPT_CRITICAL:
+ switch (priority) {
+ case BOOKE_IRQPRIO_PROGRAM:
+ case BOOKE_IRQPRIO_DTLB_MISS:
+ case BOOKE_IRQPRIO_ITLB_MISS:
+ case BOOKE_IRQPRIO_SYSCALL:
+ case BOOKE_IRQPRIO_DATA_STORAGE:
+ case BOOKE_IRQPRIO_INST_STORAGE:
+ case BOOKE_IRQPRIO_FP_UNAVAIL:
+ case BOOKE_IRQPRIO_AP_UNAVAIL:
+ case BOOKE_IRQPRIO_ALIGNMENT:
+ r = 1;
+ *mask = MSR_CE|MSR_ME|MSR_DE;
+ break;
+ case BOOKE_IRQPRIO_CRITICAL:
+ case BOOKE_IRQPRIO_WATCHDOG:
r = vcpu->arch.msr & MSR_CE;
+ *mask = MSR_ME;
break;
- case BOOKE_INTERRUPT_MACHINE_CHECK:
+ case BOOKE_IRQPRIO_MACHINE_CHECK:
r = vcpu->arch.msr & MSR_ME;
+ *mask = 0;
break;
- case BOOKE_INTERRUPT_EXTERNAL:
+ case BOOKE_IRQPRIO_EXTERNAL:
+ case BOOKE_IRQPRIO_DECREMENTER:
+ case BOOKE_IRQPRIO_FIT:
r = vcpu->arch.msr & MSR_EE;
+ *mask = MSR_CE|MSR_ME|MSR_DE;
break;
- case BOOKE_INTERRUPT_DECREMENTER:
- r = vcpu->arch.msr & MSR_EE;
+ case BOOKE_IRQPRIO_DEBUG:
+ r = vcpu->arch.msr & MSR_DE;
+ *mask = MSR_ME;
break;
- case BOOKE_INTERRUPT_FIT:
- r = vcpu->arch.msr & MSR_EE;
- break;
- case BOOKE_INTERRUPT_WATCHDOG:
- r = vcpu->arch.msr & MSR_CE;
- break;
- case BOOKE_INTERRUPT_DEBUG:
- r = vcpu->arch.msr & MSR_DE;
- break;
- default:
- r = 1;
}
return r;
}
-static void kvmppc_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
+static inline void kvmppc_deliver_interrupt_by_prio(struct kvm_vcpu *vcpu,
+ unsigned int priority,
+ u32 mask)
{
- switch (interrupt) {
- case BOOKE_INTERRUPT_DECREMENTER:
+ if (unlikely(priority == BOOKE_IRQPRIO_DECREMENTER))
vcpu->arch.tsr |= TSR_DIS;
- break;
- }
vcpu->arch.srr0 = vcpu->arch.pc;
vcpu->arch.srr1 = vcpu->arch.msr;
- vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt];
- kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]);
+ vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
+ kvmppc_set_msr(vcpu, vcpu->arch.msr & mask);
}
/* Check pending exceptions and deliver one, if possible. */
void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu)
{
unsigned long *pending = &vcpu->arch.pending_exceptions;
- unsigned int exception;
- unsigned int priority;
+ unsigned int prio;
+ u32 mask;
- priority = find_first_bit(pending, BITS_PER_BYTE * sizeof(*pending));
- while (priority <= BOOKE_MAX_INTERRUPT) {
- exception = priority_exception[priority];
- if (kvmppc_can_deliver_interrupt(vcpu, exception)) {
- kvmppc_clear_exception(vcpu, exception);
- kvmppc_deliver_interrupt(vcpu, exception);
+ prio = find_first_bit(pending, BITS_PER_BYTE * sizeof(*pending));
+ while (prio <= BOOKE_MAX_INTERRUPT) {
+ if (kvmppc_can_deliver_interrupt_by_prio(vcpu, prio, &mask)) {
+ kvmppc_clear_exception_by_prio(pending, prio);
+ kvmppc_deliver_interrupt_by_prio(vcpu, prio, mask);
break;
}
- priority = find_next_bit(pending,
- BITS_PER_BYTE * sizeof(*pending),
- priority + 1);
+ prio = find_next_bit(pending,
+ BITS_PER_BYTE * sizeof(*pending),
+ prio + 1);
}
}
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c
--- a/arch/powerpc/kvm/emulate.c
+++ b/arch/powerpc/kvm/emulate.c
@@ -418,37 +418,69 @@
* a trap. */
case SPRN_IVOR0:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[0]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
+ break;
case SPRN_IVOR1:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[1]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
+ break;
case SPRN_IVOR2:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[2]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
+ break;
case SPRN_IVOR3:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[3]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
+ break;
case SPRN_IVOR4:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[4]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
+ break;
case SPRN_IVOR5:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[5]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
+ break;
case SPRN_IVOR6:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[6]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
+ break;
case SPRN_IVOR7:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[7]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
+ break;
case SPRN_IVOR8:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[8]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
+ break;
case SPRN_IVOR9:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[9]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
+ break;
case SPRN_IVOR10:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[10]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
+ break;
case SPRN_IVOR11:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[11]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
+ break;
case SPRN_IVOR12:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[12]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
+ break;
case SPRN_IVOR13:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[13]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
+ break;
case SPRN_IVOR14:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[14]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
+ break;
case SPRN_IVOR15:
- vcpu->arch.gpr[rt] = vcpu->arch.ivor[15]; break;
+ vcpu->arch.gpr[rt] =
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
+ break;
default:
printk("mfspr: unknown spr %x\n", sprn);
@@ -568,37 +600,69 @@
case SPRN_IVPR:
vcpu->arch.ivpr = vcpu->arch.gpr[rs]; break;
case SPRN_IVOR0:
- vcpu->arch.ivor[0] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR1:
- vcpu->arch.ivor[1] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR2:
- vcpu->arch.ivor[2] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR3:
- vcpu->arch.ivor[3] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR4:
- vcpu->arch.ivor[4] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR5:
- vcpu->arch.ivor[5] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR6:
- vcpu->arch.ivor[6] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR7:
- vcpu->arch.ivor[7] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR8:
- vcpu->arch.ivor[8] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR9:
- vcpu->arch.ivor[9] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR10:
- vcpu->arch.ivor[10] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR11:
- vcpu->arch.ivor[11] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR12:
- vcpu->arch.ivor[12] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR13:
- vcpu->arch.ivor[13] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR14:
- vcpu->arch.ivor[14] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] =
+ vcpu->arch.gpr[rs];
+ break;
case SPRN_IVOR15:
- vcpu->arch.ivor[15] = vcpu->arch.gpr[rs]; break;
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] =
+ vcpu->arch.gpr[rs];
+ break;
default:
printk("mtspr: unknown spr %x\n", sprn);
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -206,9 +206,8 @@
int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
{
- unsigned int priority = exception_priority[BOOKE_INTERRUPT_DECREMENTER];
-
- return test_bit(priority, &vcpu->arch.pending_exceptions);
+ return test_bit(BOOKE_IRQPRIO_DECREMENTER,
+ &vcpu->arch.pending_exceptions);
}
static void kvmppc_decrementer_func(unsigned long data)
diff --git a/include/asm-powerpc/kvm_ppc.h b/include/asm-powerpc/kvm_ppc.h
--- a/include/asm-powerpc/kvm_ppc.h
+++ b/include/asm-powerpc/kvm_ppc.h
@@ -29,6 +29,24 @@
#include <linux/kvm_types.h>
#include <linux/kvm_host.h>
+/* interrupt priortity ordering */
+#define BOOKE_IRQPRIO_DATA_STORAGE 0
+#define BOOKE_IRQPRIO_INST_STORAGE 1
+#define BOOKE_IRQPRIO_ALIGNMENT 2
+#define BOOKE_IRQPRIO_PROGRAM 3
+#define BOOKE_IRQPRIO_FP_UNAVAIL 4
+#define BOOKE_IRQPRIO_SYSCALL 5
+#define BOOKE_IRQPRIO_AP_UNAVAIL 6
+#define BOOKE_IRQPRIO_DTLB_MISS 7
+#define BOOKE_IRQPRIO_ITLB_MISS 8
+#define BOOKE_IRQPRIO_MACHINE_CHECK 9
+#define BOOKE_IRQPRIO_DEBUG 10
+#define BOOKE_IRQPRIO_CRITICAL 11
+#define BOOKE_IRQPRIO_WATCHDOG 12
+#define BOOKE_IRQPRIO_EXTERNAL 13
+#define BOOKE_IRQPRIO_FIT 14
+#define BOOKE_IRQPRIO_DECREMENTER 15
+
struct kvm_tlb {
struct tlbe guest_tlb[PPC44x_TLB_SIZE];
struct tlbe shadow_tlb[PPC44x_TLB_SIZE];
@@ -42,7 +60,6 @@
};
extern const unsigned char exception_priority[];
-extern const unsigned char priority_exception[];
extern int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu);
extern char kvmppc_handlers_start[];
@@ -74,10 +91,10 @@
set_bit(priority, &vcpu->arch.pending_exceptions);
}
-static inline void kvmppc_clear_exception(struct kvm_vcpu *vcpu, int exception)
+static inline void kvmppc_clear_exception_by_prio(unsigned long *pending,
+ unsigned int priority)
{
- unsigned int priority = exception_priority[exception];
- clear_bit(priority, &vcpu->arch.pending_exceptions);
+ clear_bit(priority, pending);
}
/* Helper function for "full" MSR writes. No need to call this if only EE is
--
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