RE: [kvm-ia64-devel] IRQ assignment

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Avi Kivity wrote:
> Xu, Anthony wrote:
>> Xiantao and I have found the root cause,
>> Qemu emulates PIIX chipset, all pci devices can only use irq 10.11,
>> which is confiured inside chipset interrupt routing table. Even
>> though IOAPIC have 24 interrupt pins.
>> While KVM/IA64 use the same Guest Firmware with what XEN/IA64 which
>> use different "interrupt routing algorithm".
>> Means the pci device irq doesn't match between qemu and Guest
>> Firmware in KVM/IA64. So guest didn't get pci device interrupt.
>> 
>> Obviously there are two ways to fix it.
>> 1. modify qemu side, all pci devices use irq larger than or equal to
>> 16, we need to come out an algorithm to calculate irq from pci
>> device(bus number,device number, function number),
>>     then we also need to modify IA32 Guest BIOS to present the same
>> pci device irq (use same algorithm) to guest OS. Avi seems not want
>> to modify qemu a lot. 
>> 
>> 2. modify IA64 guest firmware, two pros, (1)all pci devices use only
>> 10,11 two irqs, so if there are many pci device, there are a lot of
>> interrupt sharing, which impact performance negatively
>>     (2) We need to maintain two versions fo IA64 guest firmwares, one
>> for KVM/IA64, the other for XEN/IA64, which is not what I want.
>> 
>> 
>> What's your suggestion?
>> 
>> 
> 
> Allowing qemu to use all ioapic interrupt pins will reduce interrupt
> sharing on x86, which is a good thing, so I prefer the first option
> too. 


Thanks for your support, I preper option #1,
Any suggestion for the mapping from BDF to irq.

In XEN both in IA64/IA32,

BIOS provides a 48 pin IOAPIC ( usually it is 24) to reduce irq sharing.
0~15 are reserved for legacy devices.
Pci devices use 16~47,
The mapping is like
  ((bdf >> 3) *4) %(48-16) + 16
Means every pci interrup pin( irqA, irqB, irqC, irqD) of every pci
device use different irq pin of IOAPIC if number of pci devices is less
than 8.
I think it can avoid interrupt sharing in most case.

If use this method, we can share same IA64 guest BIOS between XEN/IA64
and KVM/IA64.


What do you think?


Thanks,
Anthony


















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