Hi Eric,
On 2020/4/3 15:13, Eric Auger wrote:
+static void test_chain_promotion(void)
+{
[...]
+ /* start as MEM_ACCESS/CPU_CYCLES and move to CHAIN/MEM_ACCESS */
+ pmu_reset();
+ write_regn_el0(pmevtyper, 0, MEM_ACCESS | PMEVTYPER_EXCLUDE_EL0);
+ write_regn_el0(pmevtyper, 1, CPU_CYCLES | PMEVTYPER_EXCLUDE_EL0);
+ write_sysreg_s(0x3, PMCNTENSET_EL0);
+ write_regn_el0(pmevcntr, 0, PRE_OVERFLOW2);
+ isb();
+
+ mem_access_loop(addr, 20, pmu.pmcr_ro | PMU_PMCR_E);
+ report_info("MEM_ACCESS counter #0 has value 0x%lx",
+ read_regn_el0(pmevcntr, 0));
+
+ /* 0 becomes CHAINED */
"1 becomes CHAINED"?
+ write_sysreg_s(0x0, PMCNTENSET_EL0);
Writing 0 into PMCNTENSET_EL0 actually has no effect on the counter
status. What purpose does this serve?
+ write_regn_el0(pmevtyper, 1, CHAIN | PMEVTYPER_EXCLUDE_EL0);
+ write_sysreg_s(0x3, PMCNTENSET_EL0);
+ write_regn_el0(pmevcntr, 1, 0x0);
+
+ mem_access_loop(addr, 20, pmu.pmcr_ro | PMU_PMCR_E);
+ report_info("MEM_ACCESS counter #0 has value 0x%lx",
+ read_regn_el0(pmevcntr, 0));
+
+ report((read_regn_el0(pmevcntr, 1) == 1) && !read_sysreg(pmovsclr_el0),
+ "32b->64b: CHAIN counter incremented and no overflow");
+
+ report_info("CHAIN counter #1 = 0x%lx, overflow=0x%lx",
+ read_regn_el0(pmevcntr, 1), read_sysreg(pmovsclr_el0));
+
+ /* start as CHAIN/MEM_ACCESS and move to MEM_ACCESS/CPU_CYCLES */
+ pmu_reset();
+ write_regn_el0(pmevtyper, 0, MEM_ACCESS | PMEVTYPER_EXCLUDE_EL0);
+ write_regn_el0(pmevtyper, 1, CHAIN | PMEVTYPER_EXCLUDE_EL0);
+ write_regn_el0(pmevcntr, 0, PRE_OVERFLOW2);
+ write_sysreg_s(0x3, PMCNTENSET_EL0);
+
+ mem_access_loop(addr, 20, pmu.pmcr_ro | PMU_PMCR_E);
+ report_info("counter #0=0x%lx, counter #1=0x%lx",
+ read_regn_el0(pmevcntr, 0), read_regn_el0(pmevcntr, 1));
+
+ write_sysreg_s(0x0, PMCNTENSET_EL0);
Ditto
+ write_regn_el0(pmevtyper, 1, CPU_CYCLES | PMEVTYPER_EXCLUDE_EL0);
+ write_sysreg_s(0x3, PMCNTENSET_EL0);
+
+ mem_access_loop(addr, 20, pmu.pmcr_ro | PMU_PMCR_E);
+ report(read_sysreg(pmovsclr_el0) == 1,
+ "overflow is expected on counter 0");
+ report_info("counter #0=0x%lx, counter #1=0x%lx overflow=0x%lx",
+ read_regn_el0(pmevcntr, 0), read_regn_el0(pmevcntr, 1),
+ read_sysreg(pmovsclr_el0));
+}
+
#endif
/*
Zenghui
_______________________________________________
kvmarm mailing list
kvmarm@xxxxxxxxxxxxxxxxxxxxx
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
