Hi Reiji, On Tue, Sep 06, 2022 at 09:52:53PM -0700, Reiji Watanabe wrote: [...] > > /* CRm=3 */ > > - ID_SANITISED(MVFR0_EL1), > > - ID_SANITISED(MVFR1_EL1), > > - ID_SANITISED(MVFR2_EL1), > > + AA32_ID_SANITISED(MVFR0_EL1), > > + AA32_ID_SANITISED(MVFR1_EL1), > > + AA32_ID_SANITISED(MVFR2_EL1), > > ID_UNALLOCATED(3,3), > > - ID_SANITISED(ID_PFR2_EL1), > > + AA32_ID_SANITISED(ID_PFR2_EL1), > > ID_HIDDEN(ID_DFR1_EL1), > > Perhaps it might be better to handle ID_AFR0_EL1 and ID_DFR1_EL1 > in the same way as the other AArch32 ID registers for consistency ? > (i.e. treat them RAZ/USER_WI instead of RAZ if kvm_supports_32bit_el0() > is false instead of RAZ) Thanks for having a look. I stopped short of treating these registers as RAZ/USER_WI since an attempted nonzero write to either of these registers is a userspace bug (KVM always advertised 0). As the ABI isn't busted for these registers I'd prefer to leave it in place. Having said that, I'm not too strongly motivated in either direction. -- Thanks, Oliver _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
