Add feature_config_ctrl for PMUv3, PMS and TraceFilt, which are
indicated in ID_AA64DFR0_EL1, to program configuration registers
to trap guest's using those features when they are not exposed to
the guest.
Signed-off-by: Reiji Watanabe <reijiw@xxxxxxxxxx>
---
arch/arm64/kvm/sys_regs.c | 64 +++++++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 10f366957ce9..a09c910198d6 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -365,6 +365,30 @@ static void feature_mte_trap_activate(struct kvm_vcpu *vcpu)
feature_trap_activate(vcpu, VCPU_HCR_EL2, HCR_TID5, HCR_DCT | HCR_ATA);
}
+static void feature_trace_trap_activate(struct kvm_vcpu *vcpu)
+{
+ if (has_vhe())
+ feature_trap_activate(vcpu, VCPU_CPTR_EL2, CPACR_EL1_TTA, 0);
+ else
+ feature_trap_activate(vcpu, VCPU_CPTR_EL2, CPTR_EL2_TTA, 0);
+}
+
+static void feature_pmuv3_trap_activate(struct kvm_vcpu *vcpu)
+{
+ feature_trap_activate(vcpu, VCPU_MDCR_EL2, MDCR_EL2_TPM, 0);
+}
+
+static void feature_pms_trap_activate(struct kvm_vcpu *vcpu)
+{
+ feature_trap_activate(vcpu, VCPU_MDCR_EL2, MDCR_EL2_TPMS,
+ MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT);
+}
+
+static void feature_tracefilt_trap_activate(struct kvm_vcpu *vcpu)
+{
+ feature_trap_activate(vcpu, VCPU_MDCR_EL2, MDCR_EL2_TTRF, 0);
+}
+
/* For ID_AA64PFR0_EL1 */
static struct feature_config_ctrl ftr_ctrl_ras = {
.ftr_reg = SYS_ID_AA64PFR0_EL1,
@@ -391,6 +415,39 @@ static struct feature_config_ctrl ftr_ctrl_mte = {
.trap_activate = feature_mte_trap_activate,
};
+/* For ID_AA64DFR0_EL1 */
+static struct feature_config_ctrl ftr_ctrl_trace = {
+ .ftr_reg = SYS_ID_AA64DFR0_EL1,
+ .ftr_shift = ID_AA64DFR0_TRACEVER_SHIFT,
+ .ftr_min = 1,
+ .ftr_signed = FTR_UNSIGNED,
+ .trap_activate = feature_trace_trap_activate,
+};
+
+static struct feature_config_ctrl ftr_ctrl_pmuv3 = {
+ .ftr_reg = SYS_ID_AA64DFR0_EL1,
+ .ftr_shift = ID_AA64DFR0_PMUVER_SHIFT,
+ .ftr_min = ID_AA64DFR0_PMUVER_8_0,
+ .ftr_signed = FTR_UNSIGNED,
+ .trap_activate = feature_pmuv3_trap_activate,
+};
+
+static struct feature_config_ctrl ftr_ctrl_pms = {
+ .ftr_reg = SYS_ID_AA64DFR0_EL1,
+ .ftr_shift = ID_AA64DFR0_PMSVER_SHIFT,
+ .ftr_min = ID_AA64DFR0_PMSVER_8_2,
+ .ftr_signed = FTR_UNSIGNED,
+ .trap_activate = feature_pms_trap_activate,
+};
+
+static struct feature_config_ctrl ftr_ctrl_tracefilt = {
+ .ftr_reg = SYS_ID_AA64DFR0_EL1,
+ .ftr_shift = ID_AA64DFR0_TRACE_FILT_SHIFT,
+ .ftr_min = 1,
+ .ftr_signed = FTR_UNSIGNED,
+ .trap_activate = feature_tracefilt_trap_activate,
+};
+
#define __FTR_BITS(ftr_sign, ftr_type, bit_pos, safe) { \
.sign = ftr_sign, \
.type = ftr_type, \
@@ -4389,6 +4446,13 @@ static struct id_reg_desc id_aa64dfr0_el1_desc = {
.ftr_bits = {
S_FTR_BITS(FTR_LOWER_SAFE, ID_AA64DFR0_DOUBLELOCK_SHIFT, 0xf),
},
+ .trap_features = &(const struct feature_config_ctrl *[]) {
+ &ftr_ctrl_trace,
+ &ftr_ctrl_pmuv3,
+ &ftr_ctrl_pms,
+ &ftr_ctrl_tracefilt,
+ NULL,
+ },
};
static struct id_reg_desc id_dfr0_el1_desc = {
--
2.36.0.rc0.470.gd361397f0d-goog
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