On Fri, Aug 27, 2021 at 11:16:04AM +0100, Fuad Tabba wrote:
> Simplify code for hiding MTE support in feature id register when
> MTE is not enabled/supported by KVM.
>
> No functional change intended.
>
> Signed-off-by: Fuad Tabba <tabba@xxxxxxxxxx>
> ---
> arch/arm64/kvm/sys_regs.c | 10 ++--------
> 1 file changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 1d46e185f31e..447acce9ca84 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -1077,14 +1077,8 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
> val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV3), (u64)vcpu->kvm->arch.pfr0_csv3);
> break;
> case SYS_ID_AA64PFR1_EL1:
> - val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_MTE);
> - if (kvm_has_mte(vcpu->kvm)) {
> - u64 pfr, mte;
> -
> - pfr = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1);
> - mte = cpuid_feature_extract_unsigned_field(pfr, ID_AA64PFR1_MTE_SHIFT);
> - val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR1_MTE), mte);
> - }
> + if (!kvm_has_mte(vcpu->kvm))
> + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_MTE);
> break;
> case SYS_ID_AA64ISAR1_EL1:
> if (!vcpu_has_ptrauth(vcpu))
> --
> 2.33.0.259.gc128427fd7-goog
>
Reviewed-by: Andrew Jones <drjones@xxxxxxxxxx>
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