Hi Quentin, On Mon, Aug 9, 2021 at 5:25 PM Quentin Perret <qperret@xxxxxxxxxx> wrote: > > Introduce infrastructure allowing to manipulate software bits in stage-1 > and stage-2 page-tables using additional entries in the kvm_pgtable_prot > enum. > > This is heavily inspired by Marc's implementation of a similar feature > in the NV patch series, but adapted to allow stage-1 changes as well: > > https://lore.kernel.org/kvmarm/20210510165920.1913477-56-maz@xxxxxxxxxx/ > > Suggested-by: Marc Zyngier <maz@xxxxxxxxxx> > Signed-off-by: Quentin Perret <qperret@xxxxxxxxxx> > --- Reviewed-by: Fuad Tabba <tabba@xxxxxxxxxx> Thanks, /fuad > arch/arm64/include/asm/kvm_pgtable.h | 12 +++++++++++- > arch/arm64/kvm/hyp/pgtable.c | 5 +++++ > 2 files changed, 16 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h > index 2c090b0eee77..ff9d52f8073a 100644 > --- a/arch/arm64/include/asm/kvm_pgtable.h > +++ b/arch/arm64/include/asm/kvm_pgtable.h > @@ -121,6 +121,10 @@ enum kvm_pgtable_stage2_flags { > * @KVM_PGTABLE_PROT_W: Write permission. > * @KVM_PGTABLE_PROT_R: Read permission. > * @KVM_PGTABLE_PROT_DEVICE: Device attributes. > + * @KVM_PGTABLE_PROT_SW0: Software bit 0. > + * @KVM_PGTABLE_PROT_SW1: Software bit 1. > + * @KVM_PGTABLE_PROT_SW2: Software bit 2. > + * @KVM_PGTABLE_PROT_SW3: Software bit 3. > */ > enum kvm_pgtable_prot { > KVM_PGTABLE_PROT_X = BIT(0), > @@ -128,6 +132,11 @@ enum kvm_pgtable_prot { > KVM_PGTABLE_PROT_R = BIT(2), > > KVM_PGTABLE_PROT_DEVICE = BIT(3), > + > + KVM_PGTABLE_PROT_SW0 = BIT(55), > + KVM_PGTABLE_PROT_SW1 = BIT(56), > + KVM_PGTABLE_PROT_SW2 = BIT(57), > + KVM_PGTABLE_PROT_SW3 = BIT(58), > }; > > #define KVM_PGTABLE_PROT_RW (KVM_PGTABLE_PROT_R | KVM_PGTABLE_PROT_W) > @@ -420,7 +429,8 @@ kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr); > * If there is a valid, leaf page-table entry used to translate @addr, then > * relax the permissions in that entry according to the read, write and > * execute permissions specified by @prot. No permissions are removed, and > - * TLB invalidation is performed after updating the entry. > + * TLB invalidation is performed after updating the entry. Software bits cannot > + * be set or cleared using kvm_pgtable_stage2_relax_perms(). > * > * Return: 0 on success, negative error code on failure. > */ > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c > index e25d829587b9..cff744136044 100644 > --- a/arch/arm64/kvm/hyp/pgtable.c > +++ b/arch/arm64/kvm/hyp/pgtable.c > @@ -357,6 +357,7 @@ static int hyp_set_prot_attr(enum kvm_pgtable_prot prot, kvm_pte_t *ptep) > attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_AP, ap); > attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_SH, sh); > attr |= KVM_PTE_LEAF_ATTR_LO_S1_AF; > + attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW; > *ptep = attr; > > return 0; > @@ -558,6 +559,7 @@ static int stage2_set_prot_attr(struct kvm_pgtable *pgt, enum kvm_pgtable_prot p > > attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh); > attr |= KVM_PTE_LEAF_ATTR_LO_S2_AF; > + attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW; > *ptep = attr; > > return 0; > @@ -1025,6 +1027,9 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr, > u32 level; > kvm_pte_t set = 0, clr = 0; > > + if (prot & KVM_PTE_LEAF_ATTR_HI_SW) > + return -EINVAL; > + > if (prot & KVM_PGTABLE_PROT_R) > set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R; > > -- > 2.32.0.605.g8dce9f2422-goog > _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
