According to ARM DDI 0487G.a, page D9-2930, profiling is disabled when the PE is executing at a higher exception level than the profiling buffer owning exception level. This is also confirmed by the pseudocode for the StatisticalProfilingEnabled() function. During the world switch and before activating guest traps, KVM executes at EL2 with the buffer owning exception level being EL1 (MDCR_EL2.E2PB = 0b11). As a result, profiling is already disabled when draining the buffer, making the isb() after the write to PMSCR_EL1 unnecessary. CC: Will Deacon <will@xxxxxxxxxx> Signed-off-by: Alexandru Elisei <alexandru.elisei@xxxxxxx> --- arch/arm64/kvm/hyp/nvhe/debug-sr.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c b/arch/arm64/kvm/hyp/nvhe/debug-sr.c index 7d3f25868cae..fdf0e0ba17e9 100644 --- a/arch/arm64/kvm/hyp/nvhe/debug-sr.c +++ b/arch/arm64/kvm/hyp/nvhe/debug-sr.c @@ -33,7 +33,6 @@ static void __debug_save_spe(u64 *pmscr_el1) /* Yes; save the control register and disable data generation */ *pmscr_el1 = read_sysreg_s(SYS_PMSCR_EL1); write_sysreg_s(0, SYS_PMSCR_EL1); - isb(); /* Now drain all buffered data to memory */ psb_csync(); -- 2.32.0 _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
