On 20/05/2021 11:24, Marc Zyngier wrote: > On Wed, 19 May 2021 15:09:23 +0100, > Steven Price <steven.price@xxxxxxx> wrote: >> >> On 17/05/2021 19:09, Marc Zyngier wrote: >>> On Mon, 17 May 2021 13:32:39 +0100, >>> Steven Price <steven.price@xxxxxxx> wrote: [...]>>>> +bytes (i.e. 1/16th of the corresponding size). Each byte contains a single tag >>>> +value. This matches the format of ``PTRACE_PEEKMTETAGS`` and >>>> +``PTRACE_POKEMTETAGS``. >>>> + >>>> 5. The kvm_run structure >>>> ======================== >>>> >>>> @@ -6362,6 +6396,25 @@ default. >>>> >>>> See Documentation/x86/sgx/2.Kernel-internals.rst for more details. >>>> >>>> +7.26 KVM_CAP_ARM_MTE >>>> +-------------------- >>>> + >>>> +:Architectures: arm64 >>>> +:Parameters: none >>>> + >>>> +This capability indicates that KVM (and the hardware) supports exposing the >>>> +Memory Tagging Extensions (MTE) to the guest. It must also be enabled by the >>>> +VMM before the guest will be granted access. >>>> + >>>> +When enabled the guest is able to access tags associated with any memory given >>>> +to the guest. KVM will ensure that the pages are flagged ``PG_mte_tagged`` so >>>> +that the tags are maintained during swap or hibernation of the host; however >>>> +the VMM needs to manually save/restore the tags as appropriate if the VM is >>>> +migrated. >>>> + >>>> +When enabled the VMM may make use of the ``KVM_ARM_MTE_COPY_TAGS`` ioctl to >>>> +perform a bulk copy of tags to/from the guest. >>>> + >>> >>> Missing limitation to AArch64 guests. >> >> As mentioned previously it's not technically limited to AArch64, but >> I'll expand this to make it clear that MTE isn't usable from a AArch32 VCPU. > > I believe the architecture is quite clear that it *is* limited to > AArch64. The clarification is welcome though. I explained that badly. A system supporting MTE doesn't have to have all CPUs running AArch64 - fairly obviously you can boot a 32 bit OS on a system supporting AArch64. Since the KVM capability is a VM capability it's not architecturally inconsistent to enable it even if all your CPUs are running AArch32 (at EL1 and lower) - just a bit pointless. However, given your comment that a mixture of AArch32/AArch64 VCPUs is a bug - we can fail creation of AArch32 VCPUs and I'll explicitly document this is a AArch64 only feature. Thanks, Steve _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
