Hi all,
Since Quentin's series is pretty close to final, I though that instead
of asking for additional rework, I'd have a go at it myself. These
patches try to bring some simplifications to the cpufeature
duplication that has been introduced between EL1 and EL2.
This whole infrastructure exists for a single reason: making the
*sanitised* versions of ID_AA64MMFR{0,1}_EL1 available to EL2. On top
of that, the read_ctr macro gets in the way as it needs direct access
to arm64_ftr_reg_ctrel0 to cope with ARM64_MISMATCHED_CACHE_TYPE.
This series tackles the latest point first by taking advantage of the
fact that with pKVM enabled, late CPUs aren't allowed to boot, and
thus that we know the final CTR_EL0 value before KVM starts, no matter
whether there is a mismatch or not. We can thus specialise read_ctr to
do the right thing without requiring access to the EL1 data structure.
Once that's sorted, we can easily simplify the whole infrastructure to
only snapshot the two u64 we need before enabling the protected mode.
Tested on a Synquacer system.
M.
Marc Zyngier (3):
KVM: arm64: Constraint KVM's own __flush_dcache_area to protectected
mode
KVM: arm64: Generate final CTR_EL0 value when running in Protected
mode
KVM: arm64: Drop the CPU_FTR_REG_HYP_COPY infrastructure
arch/arm64/include/asm/assembler.h | 9 +++++++++
arch/arm64/include/asm/cpufeature.h | 1 -
arch/arm64/include/asm/kvm_cpufeature.h | 26 -------------------------
arch/arm64/include/asm/kvm_host.h | 4 ----
arch/arm64/include/asm/kvm_hyp.h | 3 +++
arch/arm64/kernel/cpufeature.c | 13 -------------
arch/arm64/kernel/image-vars.h | 1 +
arch/arm64/kvm/hyp/nvhe/cache.S | 4 ++++
arch/arm64/kvm/hyp/nvhe/hyp-smp.c | 6 ++----
arch/arm64/kvm/hyp/nvhe/mem_protect.c | 5 ++---
arch/arm64/kvm/sys_regs.c | 23 ++--------------------
arch/arm64/kvm/va_layout.c | 7 +++++++
12 files changed, 30 insertions(+), 72 deletions(-)
delete mode 100644 arch/arm64/include/asm/kvm_cpufeature.h
--
2.29.2
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