On Fri, Mar 19, 2021 at 10:01:40AM +0000, Quentin Perret wrote:
> In order to further configure stage 2 page-tables, pass flags to the
> init function using a new enum.
>
> The first of these flags allows to disable FWB even if the hardware
> supports it as we will need to do so for the host stage 2.
>
> Signed-off-by: Quentin Perret <qperret@xxxxxxxxxx>
> ---
> arch/arm64/include/asm/kvm_pgtable.h | 43 +++++++++++++-------
> arch/arm64/include/asm/pgtable-prot.h | 4 +-
> arch/arm64/kvm/hyp/pgtable.c | 56 +++++++++++++++------------
> 3 files changed, 62 insertions(+), 41 deletions(-)
[...]
> diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h
> index 9a65fb528110..079f4e9a3e84 100644
> --- a/arch/arm64/include/asm/pgtable-prot.h
> +++ b/arch/arm64/include/asm/pgtable-prot.h
> @@ -71,10 +71,10 @@ extern bool arm64_use_ng_mappings;
> #define PAGE_KERNEL_EXEC __pgprot(PROT_NORMAL & ~PTE_PXN)
> #define PAGE_KERNEL_EXEC_CONT __pgprot((PROT_NORMAL & ~PTE_PXN) | PTE_CONT)
>
> -#define PAGE_S2_MEMATTR(attr) \
> +#define PAGE_S2_MEMATTR(attr, has_fwb) \
> ({ \
> u64 __val; \
> - if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) \
> + if (has_fwb) \
> __val = PTE_S2_MEMATTR(MT_S2_FWB_ ## attr); \
> else \
> __val = PTE_S2_MEMATTR(MT_S2_ ## attr); \
Given that this isn't used outside of pgtable.c, I wonder if we should move
it in there, as it's a pretty low-level thing to do now that it takes the
'has_fwb' parameter.
But regardless,
Acked-by: Will Deacon <will@xxxxxxxxxx>
Will
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