On Thu, Mar 18, 2021 at 12:25:26PM +0000, Marc Zyngier wrote:
> A common pattern is to conditionally update ZCR_ELx in order
> to avoid the "self-synchronizing" effect that writing to this
> register has.
>
> Let's provide an accessor that does exactly this.
>
> Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
> ---
> arch/arm64/include/asm/fpsimd.h | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
> index bec5f14b622a..05c9c55768b8 100644
> --- a/arch/arm64/include/asm/fpsimd.h
> +++ b/arch/arm64/include/asm/fpsimd.h
> @@ -130,6 +130,15 @@ static inline void sve_user_enable(void)
> sysreg_clear_set(cpacr_el1, 0, CPACR_EL1_ZEN_EL0EN);
> }
>
> +#define sve_cond_update_zcr_vq(val, reg) \
> + do { \
> + u64 __zcr = read_sysreg_s((reg)); \
> + u64 __new = __zcr & ~ZCR_ELx_LEN_MASK; \
> + __new |= (val) & ZCR_ELx_LEN_MASK; \
> + if (__zcr != __new) \
> + write_sysreg_s(__new, (reg)); \
> + } while (0)
Acked-by: Will Deacon <will@xxxxxxxxxx>
Will
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