On 2020/12/31 20:22, Marc Zyngier wrote: > On 2020-12-31 11:58, Shenming Lu wrote: >> On 2020/12/31 16:57, Marc Zyngier wrote: >>> Hi Shemming, >>> >>> On 2020-12-31 06:28, Shenming Lu wrote: >>>> When the EnableLPIs bit is set to 0, any ITS LPI requests in the >>>> Redistributor would be ignored. And this check is independent from >>>> the ITS LPI translation. So it might be better to move the check >>>> of the EnableLPIs bit out of the LPI resolving, and also add it >>>> to the path that uses the translation cache. >>> >>> But by doing that, you are moving the overhead of checking for >>> EnableLPIs from the slow path (translation walk) to the fast >>> path (cache hit), which seems counter-productive. >> >> Oh, I didn't notice the overhead of the checking, I thought it would >> be negligible... > > It probably doesn't show on a modern box, but some of the slower > systems might see it. Overall, this is a design decision to keep > the translation cache as simple and straightforward as possible: > if anything affects the output of the cache, we invalidate it, > and that's it. Ok, get it. > >> >>> >>>> Besides it seems that >>>> by this the invalidating of the translation cache caused by the LPI >>>> disabling is unnecessary. >>>> >>>> Not sure if I have missed something... Thanks. >>> >>> I am certainly missing the purpose of this patch. >>> >>> The effect of EnableLPIs being zero is to drop the result of any >>> translation (a new pending bit) on the floor. Given that, it is >>> immaterial whether this causes a new translation or hits in the >>> cache, as the result is still to not pend a new interrupt. >>> >>> I get the feeling that you are trying to optimise for the unusual >>> case where EnableLPIs is 0 *and* you have a screaming device >>> injecting tons of interrupt. If that is the case, I don't think >>> this is worth it. >> >> In fact, I just found (imagining) that if the EnableLPIs bit is 0, >> the kvm_vgic_v4_set_forwarding() would fail when performing the LPI >> translation, but indeed we don't try to pend any interrupts there... >> >> By the way, it seems that the LPI disabling would not affect the >> injection of VLPIs... > > Yes, good point. We could unmap the VPE from all ITS, which would result > in all translations to be discarded, but this has the really bad side > effect of *also* preventing the delivery of vSGIs, which isn't what > you'd expect. > > Overall, I don't think there is a good way to support this, and maybe > we should just prevent EnableLPIs to be turned off when using direct > injection. After all, the architecture does allow that for GICv3 > implementations, which is what we emulate. Agreed, if there is no good way, we could just make the EnableLPIs clearing unsupported... Thanks(Happy 2021), Shenming > > Thanks, > > M. _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
