On Fri, Dec 18, 2020 at 03:15:42PM +0800, Jingyi Wang wrote: > For the origin value of CNTV_CVAL_EL0 architecturally UNKNOWN, we may > receive an unexpected PPI before we actual trigger the timer interrupt. > So we should set ARCH_TIMER_CTL_IMASK in timer_prep. > > Signed-off-by: Jingyi Wang <wangjingyi11@xxxxxxxxxx> > --- > arm/micro-bench.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arm/micro-bench.c b/arm/micro-bench.c > index 362f93e..95c418c 100644 > --- a/arm/micro-bench.c > +++ b/arm/micro-bench.c > @@ -227,7 +227,7 @@ static bool timer_prep(void) > } > > writel(1 << PPI(TIMER_VTIMER_IRQ), gic_isenabler); > - write_sysreg(ARCH_TIMER_CTL_ENABLE, cntv_ctl_el0); > + write_sysreg(ARCH_TIMER_CTL_IMASK | ARCH_TIMER_CTL_ENABLE, cntv_ctl_el0); > isb(); > > gic_prep_common(); > -- > 2.19.1 > Queued, https://gitlab.com/rhdrjones/kvm-unit-tests/commits/arm/queue Thanks, drew _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
