On 10/26/20 7:53 PM, Marc Zyngier wrote:
On 2020-10-25 22:23, Gavin Shan wrote:
Hi Marc,
On 10/25/20 8:52 PM, Marc Zyngier wrote:
On Sun, 25 Oct 2020 01:27:37 +0100,
Gavin Shan <gshan@xxxxxxxxxx> wrote:
The 52-bits physical address is disabled until CONFIG_ARM64_PA_BITS_52
is chosen. This uses option for that check, to avoid the unconditional
check on PAGE_SHIFT in the hot path and thus save some CPU cycles.
PAGE_SHIFT is known at compile time, and this code is dropped by the
compiler if the selected page size is not 64K. This patch really only
makes the code slightly less readable and the "CPU cycles" argument
doesn't hold at all.
So what are you trying to solve exactly?
There are two points covered by the patch: (1) The 52-bits physical address
is visible only when CONFIG_ARM64_PA_BITS_52 is enabled in arch/arm64 code.
The code looks consistent with this option used here. (2) I had the assumption
that gcc doesn't optimize the code and PAGE_SHIFT is always checked in order
to get higher 4 physical address bits, but you said gcc should optimize the
code accordingly. However, it would be still nice to make the code explicit.
Conditional compilation only results in more breakages, specially for configs
that hardly anyone uses (big-endian and 64K pages are the two that bitrot very
quickly).
So if anything can build without #ifdef, I'll take that anytime. If the compiler
doesn't optimize it away, let's fix the compiler.
Ok. PATCH[1] and PATCH[2] have been dropped in v2.
Cheers,
Gavin
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