On Wed, Oct 21, 2020 at 11:05:10AM +0100, Marc Zyngier wrote: > On 2020-10-20 15:40, Rob Herring wrote: > > On Thu, Sep 24, 2020 at 8:48 AM Rob Herring <robh@xxxxxxxxxx> wrote: > > > > > > On Cortex-A77 r0p0 and r1p0, a sequence of a non-cacheable or device > > > load > > > and a store exclusive or PAR_EL1 read can cause a deadlock. > > > > > > The workaround requires a DMB SY before and after a PAR_EL1 register > > > read. In addition, it's possible an interrupt (doing a device read) or > > > KVM guest exit could be taken between the DMB and PAR read, so we > > > also need a DMB before returning from interrupt and before returning > > > to > > > a guest. > > > > > > A deadlock is still possible with the workaround as KVM guests must > > > also > > > have the workaround. IOW, a malicious guest can deadlock an affected > > > systems. > > > > > > This workaround also depends on a firmware counterpart to enable the > > > h/w > > > to insert DMB SY after load and store exclusive instructions. See the > > > errata document SDEN-1152370 v10 [1] for more information. > > > > > > [1] https://static.docs.arm.com/101992/0010/Arm_Cortex_A77_MP074_Software_Developer_Errata_Notice_v10.pdf > > > > > > Cc: Catalin Marinas <catalin.marinas@xxxxxxx> > > > Cc: James Morse <james.morse@xxxxxxx> > > > Cc: Suzuki K Poulose <suzuki.poulose@xxxxxxx> > > > Cc: Will Deacon <will@xxxxxxxxxx> > > > Cc: Marc Zyngier <maz@xxxxxxxxxx> > > > Cc: Julien Thierry <julien.thierry.kdev@xxxxxxxxx> > > > Cc: kvmarm@xxxxxxxxxxxxxxxxxxxxx > > > Signed-off-by: Rob Herring <robh@xxxxxxxxxx> > > > --- > > > v6: > > > - Do dmb on kernel_exit rather than disabling interrupts around PAR > > > read > > > v5: > > > - Rebase on v5.9-rc3 > > > - Disable interrupts around PAR reads > > > - Add DMB on return to guest > > > > > > v4: > > > - Move read_sysreg_par out of KVM code to sysreg.h to share > > > - Also use read_sysreg_par in fault.c and kvm/sys_regs.c > > > - Use alternative f/w for dmbs around PAR read > > > - Use cpus_have_final_cap instead of cpus_have_const_cap > > > - Add note about speculation of PAR read > > > > > > v3: > > > - Add dmbs around PAR reads in KVM code > > > - Clean-up 'work-around' and 'errata' > > > > > > v2: > > > - Don't disable KVM, just print warning > > > --- > > > Documentation/arm64/silicon-errata.rst | 2 ++ > > > arch/arm64/Kconfig | 20 ++++++++++++++++++++ > > > arch/arm64/include/asm/cpucaps.h | 3 ++- > > > arch/arm64/include/asm/sysreg.h | 9 +++++++++ > > > arch/arm64/kernel/cpu_errata.c | 10 ++++++++++ > > > arch/arm64/kernel/entry.S | 3 +++ > > > arch/arm64/kvm/arm.c | 3 ++- > > > arch/arm64/kvm/hyp/include/hyp/switch.h | 21 +++++++++++++-------- > > > arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 2 +- > > > arch/arm64/kvm/hyp/nvhe/switch.c | 2 +- > > > arch/arm64/kvm/hyp/vhe/switch.c | 2 +- > > > arch/arm64/kvm/sys_regs.c | 2 +- > > > arch/arm64/mm/fault.c | 2 +- > > > 13 files changed, 66 insertions(+), 15 deletions(-) > > > > Marc, Can I get an ack for KVM on this? Will is waiting for one before > > applying. > > Here you go: > > Acked-by: Marc Zyngier <maz@xxxxxxxxxx> Cheers, Marc. Rob -- can you repost this based on -rc1 please? Will _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
