On Tue, 15 Sep 2020 18:04:42 +0100, Alexandru Elisei wrote:
> As a result of a KVM_SET_USER_MEMORY_REGION ioctl, KVM flushes the
> dcache for the memslot being changed to ensure a consistent view of memory
> between the host and the guest: the host runs with caches enabled, and
> it is possible for the data written by the hypervisor to still be in the
> caches, but the guest is running with stage 1 disabled, meaning data
> accesses are to Device-nGnRnE memory, bypassing the caches entirely.
>
> [...]
Applied to next, thanks!
[1/1] KVM: arm64: Do not flush memslot if FWB is supported
commit: ada329e6b5b406f33fae665e62caff7814409906
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@xxxxxxxxxxxxxxxxxxxxx
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
