Hi all, This is version two of the patches I posted last week: https://lore.kernel.org/r/20200724143506.17772-1-will@xxxxxxxxxx I got my brain in a twist with exactly what is reported in HPFAR for a stage-2 abort on a stage-1 table walk, so I don't think any of these are serious any more. With these changes, the early stage-2 fault handling follows: S2 instruction abort: * Not in memslot, or S2 fault on S1 walk for tables in R/O memslot: => inject external iabt to guest S2 data abort: * Not in memslot: - S2 fault on S1 walk: inject external dabt to guest - Cache maintenance: skip instr - Syndrome valid EXIT_MMIO - Syndrome invalid EXIT_NISV * Write fault in R/O memslot: - S2 fault on S1 walk: inject external dabt to guest - Access is write: - Syndrome valid EXIT_MMIO - Syndrome invalid EXIT_NISV (includes cache maintenance) Everything else gets handled by handle_access_fault()/user_mem_abort(). Will Cc: James Morse <james.morse@xxxxxxx> Cc: Suzuki Poulose <suzuki.poulose@xxxxxxx> Cc: kernel-team@xxxxxxxxxxx --->8 Will Deacon (4): KVM: arm64: Rename kvm_vcpu_dabt_isextabt() KVM: arm64: Handle data and instruction external aborts the same way KVM: arm64: Don't skip cache maintenance for read-only memslots KVM: arm64: Move S1PTW S2 fault logic out of io_mem_abort() arch/arm64/include/asm/kvm_emulate.h | 2 +- arch/arm64/kvm/hyp/switch.c | 2 +- arch/arm64/kvm/mmio.c | 6 ------ arch/arm64/kvm/mmu.c | 26 +++++++++++++++++--------- 4 files changed, 19 insertions(+), 17 deletions(-) -- 2.28.0.rc0.142.g3c755180ce-goog _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
