Different actions are taken depending on whether the vcpu is the host or
not but this choice could easily be changed to another property of the
vcpu, if required.
Signed-off-by: Andrew Scull <ascull@xxxxxxxxxx>
---
arch/arm64/include/asm/kvm_hyp.h | 3 +--
arch/arm64/kvm/hyp/nvhe/switch.c | 7 ++----
arch/arm64/kvm/hyp/nvhe/timer-sr.c | 35 +++++++++++-------------------
3 files changed, 16 insertions(+), 29 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h
index d4d366e0d78d..fdacb26ac475 100644
--- a/arch/arm64/include/asm/kvm_hyp.h
+++ b/arch/arm64/include/asm/kvm_hyp.h
@@ -81,8 +81,7 @@ void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if);
int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu);
#ifdef __KVM_NVHE_HYPERVISOR__
-void __timer_enable_traps(struct kvm_vcpu *vcpu);
-void __timer_disable_traps(struct kvm_vcpu *vcpu);
+void __timer_restore_traps(struct kvm_vcpu *vcpu);
#endif
#ifdef __KVM_NVHE_HYPERVISOR__
diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c
index fa90fc776374..05f1cf7ee9e7 100644
--- a/arch/arm64/kvm/hyp/nvhe/switch.c
+++ b/arch/arm64/kvm/hyp/nvhe/switch.c
@@ -131,15 +131,11 @@ static void __kvm_vcpu_switch_to_guest(struct kvm_vcpu *host_vcpu,
}
__pmu_switch_to_guest();
-
- __timer_enable_traps(vcpu);
}
static void __kvm_vcpu_switch_to_host(struct kvm_vcpu *host_vcpu,
struct kvm_vcpu *vcpu)
{
- __timer_disable_traps(vcpu);
-
__pmu_switch_to_host();
/* Returning to host will clear PSR.I, remask PMR if needed */
@@ -211,6 +207,7 @@ static void __vcpu_restore_state(struct kvm_vcpu *vcpu, bool restore_debug)
__activate_traps(vcpu);
__hyp_vgic_restore_state(vcpu);
+ __timer_restore_traps(vcpu);
/*
* This must come after restoring the sysregs since SPE may make use if
@@ -280,7 +277,7 @@ void __noreturn hyp_panic(void)
unsigned long str_va;
if (vcpu != host_vcpu) {
- __timer_disable_traps(vcpu);
+ __timer_restore_traps(host_vcpu);
__deactivate_traps(host_vcpu, vcpu);
__restore_stage2(host_vcpu);
__sysreg_restore_state_nvhe(&host_vcpu->arch.ctxt);
diff --git a/arch/arm64/kvm/hyp/nvhe/timer-sr.c b/arch/arm64/kvm/hyp/nvhe/timer-sr.c
index 9072e71693ba..914d2624467d 100644
--- a/arch/arm64/kvm/hyp/nvhe/timer-sr.c
+++ b/arch/arm64/kvm/hyp/nvhe/timer-sr.c
@@ -19,30 +19,21 @@ void __kvm_timer_set_cntvoff(u64 cntvoff)
* Should only be called on non-VHE systems.
* VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
*/
-void __timer_disable_traps(struct kvm_vcpu *vcpu)
+void __timer_restore_traps(struct kvm_vcpu *vcpu)
{
- u64 val;
+ u64 val = read_sysreg(cnthctl_el2);
- /* Allow physical timer/counter access for the host */
- val = read_sysreg(cnthctl_el2);
- val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN;
- write_sysreg(val, cnthctl_el2);
-}
-
-/*
- * Should only be called on non-VHE systems.
- * VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
- */
-void __timer_enable_traps(struct kvm_vcpu *vcpu)
-{
- u64 val;
+ if (vcpu->arch.ctxt.is_host) {
+ /* Allow physical timer/counter access for the host */
+ val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN;
+ } else {
+ /*
+ * Disallow physical timer access for the guest
+ * Physical counter access is allowed
+ */
+ val &= ~CNTHCTL_EL1PCEN;
+ val |= CNTHCTL_EL1PCTEN;
+ }
- /*
- * Disallow physical timer access for the guest
- * Physical counter access is allowed
- */
- val = read_sysreg(cnthctl_el2);
- val &= ~CNTHCTL_EL1PCEN;
- val |= CNTHCTL_EL1PCTEN;
write_sysreg(val, cnthctl_el2);
}
--
2.27.0.389.gc38d7665816-goog
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