On Tue, Apr 07, 2020 at 02:20:20PM +0530, Anshuman Khandual wrote: > > > On 04/06/2020 10:39 PM, Will Deacon wrote: > > On Tue, Jan 28, 2020 at 06:09:03PM +0530, Anshuman Khandual wrote: > >> This series is primarily motivated from an adhoc list from Mark Rutland > >> during our ID_ISAR6 discussion [1]. Besides, it also includes a patch > >> which does macro replacement for various open bits shift encodings in > >> various CPU ID registers. This series is based on linux-next 20200124. > >> > >> [1] https://patchwork.kernel.org/patch/11287805/ > >> > >> Is there anything else apart from these changes which can be accommodated > >> in this series, please do let me know. Thank you. > > > > The latest Arm ARM also talks about DFR1 and MMFR5. Please can you include > > Sure, will do. > > > those too? Might also be worth checking to see if anything is missing on > > the 64-bit side as well (I didn't look). > > Yeah. Now there some missing ones, will add those as well. Thanks. Just as a heads up that I've also got a handful of changes in this area, but we can resolve the conflicts at -rc1. https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=sanity-checks Will _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
