On Mon, Mar 23, 2020 at 10:26:18AM +0000, Marc Zyngier wrote: > On 2020-03-23 09:41, Lev Aronsky wrote: > > On Mon, Mar 23, 2020 at 09:07:12AM +0000, Marc Zyngier wrote: > > > On 2020-03-23 08:22, Lev Aronsky wrote: [...] > > > > > > I'm pretty sure this wouldn't work with HW virtualization. I suspect > > > this would UNDEF directly on the CPU, leading to an exception being > > > taken > > > at EL1 without intervention of the hypervisor. Which makes sense as > > > you'd > > > be executing an instruction that the CPU really doesn't implement. > > > > Yes, that seems to be what's happening. We'll have to think of a > > different mechanism for trapping access from user-mode straight to the > > hypervisor - or, alternatively, move our custom code into the kernel. I > > know it's a bit off-topic, but thank you for your advice! > > One possibility would be trap accesses to a special page (magic device?), > but that requires cooperation from the OS kernel as well. There is hardly > anything else that would guarantee a trap directly from EL0 to EL2 (EL1 > can always get in the way). These are the times I miss the simplicity of CPUID and VMCALL/VMMCALL on x86... A special page might work - we are already doing some minor patches in the kernel, adding a single EL0-accessible page might be the way to go. Thanks. > > M. > -- > Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
