Allocate the LPI configuration and per re-distributor pending table.
Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
by default in the config table.
Also introduce a helper routine that allows to set the pending
table bit for a given LPI and macros to set/get its configuration.
Signed-off-by: Eric Auger <eric.auger@xxxxxxxxxx>
Reviewed-by: Zenghui Yu <yuzenghui@xxxxxxxxxx>
---
v5 -> v6:
- fix the assert()
- remove GICR_PROPBASER_IDBITS_MASK
- remove gicv3_lpi_set_config and gicv3_lpi_get_config declarations
and move macros in this patch
v4 -> v5:
- Moved some reformattings previously done in
"arm/arm64: ITS: its_enable_defaults", in this patch
- added assert(!gicv3_redist_base()) in gicv3_lpi_alloc_tables()
- revert for_each_present_cpu() change
v2 -> v3:
- Move the helpers in lib/arm/gic-v3.c and prefix them with "gicv3_"
and add _lpi prefix too
v1 -> v2:
- remove memory attributes
---
lib/arm/asm/gic-v3.h | 17 ++++++++++++++
lib/arm/gic-v3.c | 53 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 70 insertions(+)
diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
index 47df051..fedffa8 100644
--- a/lib/arm/asm/gic-v3.h
+++ b/lib/arm/asm/gic-v3.h
@@ -50,6 +50,13 @@
#define MPIDR_TO_SGI_AFFINITY(cluster_id, level) \
(MPIDR_AFFINITY_LEVEL(cluster_id, level) << ICC_SGI1R_AFFINITY_## level ## _SHIFT)
+#define GICR_PENDBASER_PTZ BIT_ULL(62)
+
+#define LPI_PROP_GROUP1 (1 << 1)
+#define LPI_PROP_ENABLED (1 << 0)
+#define LPI_PROP_DEFAULT_PRIO 0xa0
+#define LPI_PROP_DEFAULT (LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | LPI_PROP_ENABLED)
+
#include <asm/arch_gicv3.h>
#ifndef __ASSEMBLY__
@@ -66,6 +73,8 @@ struct gicv3_data {
void *dist_base;
void *redist_bases[GICV3_NR_REDISTS];
void *redist_base[NR_CPUS];
+ u8 *lpi_prop;
+ void *lpi_pend[NR_CPUS];
unsigned int irq_nr;
};
extern struct gicv3_data gicv3_data;
@@ -82,6 +91,8 @@ extern void gicv3_write_eoir(u32 irqstat);
extern void gicv3_ipi_send_single(int irq, int cpu);
extern void gicv3_ipi_send_mask(int irq, const cpumask_t *dest);
extern void gicv3_set_redist_base(size_t stride);
+extern void gicv3_lpi_set_clr_pending(int rdist, int n, bool set);
+extern void gicv3_lpi_alloc_tables(void);
static inline void gicv3_do_wait_for_rwp(void *base)
{
@@ -127,5 +138,11 @@ static inline u64 mpidr_uncompress(u32 compressed)
return mpidr;
}
+#define gicv3_lpi_set_config(intid, value) ({ \
+ gicv3_data.lpi_prop[LPI_OFFSET(intid)] = value; \
+})
+
+#define gicv3_lpi_get_config(intid) (gicv3_data.lpi_prop[LPI_OFFSET(intid)])
+
#endif /* !__ASSEMBLY__ */
#endif /* _ASMARM_GIC_V3_H_ */
diff --git a/lib/arm/gic-v3.c b/lib/arm/gic-v3.c
index feecb5e..6cf1d1d 100644
--- a/lib/arm/gic-v3.c
+++ b/lib/arm/gic-v3.c
@@ -5,6 +5,7 @@
*/
#include <asm/gic.h>
#include <asm/io.h>
+#include <alloc_page.h>
void gicv3_set_redist_base(size_t stride)
{
@@ -147,3 +148,55 @@ void gicv3_ipi_send_single(int irq, int cpu)
cpumask_set_cpu(cpu, &dest);
gicv3_ipi_send_mask(irq, &dest);
}
+
+#if defined(__aarch64__)
+
+/*
+ * alloc_lpi_tables - Allocate LPI config and pending tables
+ * and set PROPBASER (shared by all rdistributors) and per
+ * redistributor PENDBASER.
+ *
+ * gicv3_set_redist_base() must be called before
+ */
+void gicv3_lpi_alloc_tables(void)
+{
+ unsigned long n = SZ_64K >> PAGE_SHIFT;
+ unsigned long order = fls(n);
+ u64 prop_val;
+ int cpu;
+
+ assert(gicv3_redist_base());
+
+ gicv3_data.lpi_prop = alloc_pages(order);
+
+ /* ID bits = 13, ie. up to 14b LPI INTID */
+ prop_val = (u64)(virt_to_phys(gicv3_data.lpi_prop)) | 13;
+
+ for_each_present_cpu(cpu) {
+ u64 pend_val;
+ void *ptr;
+
+ ptr = gicv3_data.redist_base[cpu];
+
+ writeq(prop_val, ptr + GICR_PROPBASER);
+
+ gicv3_data.lpi_pend[cpu] = alloc_pages(order);
+ pend_val = (u64)(virt_to_phys(gicv3_data.lpi_pend[cpu]));
+ writeq(pend_val, ptr + GICR_PENDBASER);
+ }
+}
+
+void gicv3_lpi_set_clr_pending(int rdist, int n, bool set)
+{
+ u8 *ptr = gicv3_data.lpi_pend[rdist];
+ u8 mask = 1 << (n % 8), byte;
+
+ ptr += (n / 8);
+ byte = *ptr;
+ if (set)
+ byte |= mask;
+ else
+ byte &= ~mask;
+ *ptr = byte;
+}
+#endif /* __aarch64__ */
--
2.20.1
_______________________________________________
kvmarm mailing list
kvmarm@xxxxxxxxxxxxxxxxxxxxx
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
