On Sun, 16 Feb 2020 18:53:21 +0000 Marc Zyngier <maz@xxxxxxxxxx> wrote: Hi, > Our current ID register filtering is starting to be a mess of if() > statements, and isn't going to get any saner. > > Let's turn it into a switch(), which has a chance of being more > readable. Indeed, much better now. > Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx> Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx> Thanks, Andre > --- > arch/arm64/kvm/sys_regs.c | 22 +++++++++++++++------- > 1 file changed, 15 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index da82c4b03aab..682fedd7700f 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -9,6 +9,7 @@ > * Christoffer Dall <c.dall@xxxxxxxxxxxxxxxxxxxxxx> > */ > > +#include <linux/bitfield.h> > #include <linux/bsearch.h> > #include <linux/kvm_host.h> > #include <linux/mm.h> > @@ -1070,6 +1071,8 @@ static bool access_arch_timer(struct kvm_vcpu *vcpu, > return true; > } > > +#define FEATURE(x) (GENMASK_ULL(x##_SHIFT + 3, x##_SHIFT)) > + > /* Read a sanitised cpufeature ID register by sys_reg_desc */ > static u64 read_id_reg(const struct kvm_vcpu *vcpu, > struct sys_reg_desc const *r, bool raz) > @@ -1078,13 +1081,18 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, > (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); > u64 val = raz ? 0 : read_sanitised_ftr_reg(id); > > - if (id == SYS_ID_AA64PFR0_EL1 && !vcpu_has_sve(vcpu)) { > - val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT); > - } else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) { > - val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) | > - (0xfUL << ID_AA64ISAR1_API_SHIFT) | > - (0xfUL << ID_AA64ISAR1_GPA_SHIFT) | > - (0xfUL << ID_AA64ISAR1_GPI_SHIFT)); > + switch (id) { > + case SYS_ID_AA64PFR0_EL1: > + if (!vcpu_has_sve(vcpu)) > + val &= ~FEATURE(ID_AA64PFR0_SVE); > + break; > + case SYS_ID_AA64ISAR1_EL1: > + if (!vcpu_has_ptrauth(vcpu)) > + val &= ~(FEATURE(ID_AA64ISAR1_APA) | > + FEATURE(ID_AA64ISAR1_API) | > + FEATURE(ID_AA64ISAR1_GPA) | > + FEATURE(ID_AA64ISAR1_GPI)); > + break; > } > > return val; _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm