Hi Marc, On 16/02/2020 18:53, Marc Zyngier wrote: > Our PMU code is only implementing the ARMv8.1 features, so let's > stick to this when reporting the feature set to the guest. > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 682fedd7700f..06b2d0dc6c73 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -1093,6 +1093,11 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, > FEATURE(ID_AA64ISAR1_GPA) | > FEATURE(ID_AA64ISAR1_GPI)); > break; > + case SYS_ID_AA64DFR0_EL1: > + /* Limit PMU to ARMv8.1 */ Not just limit, but upgrade too! (force?) This looks safe because ARMV8_PMU_EVTYPE_EVENT always includes the extra bits this added, and the register is always trapped. The PMU version is also readable via ID_DFR0_EL1.PerfMon, should that be sanitised to be the same? (I don't think we've hidden an aarch64 feature that also existed in aarch32 before). Regardless: Reviewed-by: James Morse <james.morse@xxxxxxx> Thanks, James > + val &= ~FEATURE(ID_AA64DFR0_PMUVER); > + val |= FIELD_PREP(FEATURE(ID_AA64DFR0_PMUVER), 4); > + break; > } > > return val; > _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
