On 2019-12-24 13:36, Andrew Murray wrote:
On Tue, Dec 24, 2019 at 01:22:46PM +0000, Marc Zyngier wrote:
On 2019-12-24 13:08, Andrew Murray wrote:
[...]
> This does feel like the pragmatic approach - a larger black hole
in
> exchange
> for performance. I imagine the blackhole would be naturally
reduced on
> machines with high workloads.
Why? I don't see the relation between how busy the vcpu is and the
size
of the blackhole. It is strictly a function of the frequency of
exits.
Indeed, my assumption being that the busier a system is the more
interrupts, thus leading to more exits and so an increased frequency
of
SPE interrupt evaluation and thus smaller black hole.
On a GICv4-enabled system, this isn't true anymore. My bet is that
people won't use SPE to optimize IO-oriented workloads, but more CPU
intensive workloads (that don't necessarily exit at all).
But never mind. Let's start with this approach, as it is simple and
easy
to verify. If the black hole aspect becomes problematic, we know how
to reduce it (at the expense of entry/exit performance).
M.
--
Jazz is not dead. It just smells funny...
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