On Sun, 1 Dec 2019 at 12:20, Marc Zyngier <maz@xxxxxxxxxx> wrote: > > Hi all, > > This series is a follow-up on [1], which tried to address the > remaining missing HCR_EL2.TIDx traps. I've hopefully now adressed the > comments that Peter and Edgar raised. > > I've also tried to tackle missing traps generated by HSTR_EL2, which > got completely ignored so far. Note that this results in the use of a > new TB bit, which I understand is a rare resource. I'd welcome > comments on how to handle it differently if at all possible. > > Finally, and as a bonus non-feature, I've added support for the > missing Jazelle registers, giving me the opportunity to allow trapping > of JIDR to EL2 using HCR_EL2.TID0. Yay, Christmas! ;-) > > I'm now going back to kernel stuff. I swear! To save you from having to roll a v3, I've fixed up the handful of nits Richard and I found as I applied this series to target-arm.next. thanks -- PMM _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
