When both groups are avaiable to the non-secure side, the MMIO group
registers need to be writable, so that the group that an IRQ belongs to
can be programmed.
Check that the group can be flipped, after having established that both
groups are usable.
Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>
---
arm/gic.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arm/gic.c b/arm/gic.c
index c882a24..485ca4f 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -683,6 +683,7 @@ static bool gicv3_check_security(void *gicd_base)
static void test_irq_group(void *gicd_base)
{
bool is_gicv3 = (gic_version() == 3);
+ u32 reg;
report_prefix_push("GROUP");
gic_enable_defaults();
@@ -692,6 +693,16 @@ static void test_irq_group(void *gicd_base)
if (!gicv3_check_security(gicd_base))
return;
}
+
+ /*
+ * On a security aware GIC in non-secure world the IGROUPR registers
+ * are RAZ/WI. KVM emulates a single-security-state GIC, so both
+ * groups are available and the IGROUPR registers are writable.
+ */
+ reg = gic_get_irq_group(SPI_IRQ);
+ gic_set_irq_group(SPI_IRQ, !reg);
+ report("IGROUPR is writable", gic_get_irq_group(SPI_IRQ) != reg);
+ gic_set_irq_group(SPI_IRQ, reg);
}
static void spi_send(void)
--
2.17.1
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