Hi Marc, On 19/10/2019 10:55, Marc Zyngier wrote: > In order to prepare for handling erratum 1319367, we need to make > sure that all system registers (and most importantly the registers > configuring the virtual memory) are set before we enable stage-2 > translation. > > This results in a minor reorganisation of the load sequence, without > any functional change. Reviewed-by: James Morse <james.morse@xxxxxxx> Thanks, James _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
