On 21/08/2019 18:01, Julien Grall wrote: > Hi Andre, > > On 21/08/2019 18:00, Andre Przywara wrote: >> At the moment we initialise the target *mask* of a virtual IRQ to the >> VCPU it belongs to, even though this mask is only defined for GICv2 and >> quickly runs out of bits for many GICv3 guests. >> This behaviour triggers an UBSAN complaint for more than 32 VCPUs: >> ------ >> [ 5659.462377] UBSAN: Undefined behaviour in virt/kvm/arm/vgic/vgic-init.c:223:21 >> [ 5659.471689] shift exponent 32 is too large for 32-bit type 'unsigned int' >> ------ >> Also for GICv3 guests the reporting of TARGET in the "vgic-state" debugfs >> dump is wrong, due to this very same problem. >> >> Fix both issues by only initialising vgic_irq->targets for a vGICv2 guest, >> and by initialising vgic_irq->mpdir for vGICv3 guests instead. We can't >> use the actual MPIDR for that, as the VCPU's system register is not >> initialised at this point yet. This is not really an issue, as ->mpidr >> is just used for the debugfs output and the IROUTER MMIO register, which >> does not exist in redistributors (dealing with SGIs and PPIs). >> >> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> >> Reported-by: Dave Martin <dave.martin@xxxxxxx> > > Tested-by: Julien Grall <julien.grall@xxxxxxx> Sorry for having dropped the ball on that one. Now applied to kvmarm/next, with Julien's TB and a Cc: stable. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
