Re: [PATCH 2/3] KVM: arm/arm64: vgic-its: Do not execute invalidate MSI-LPI translation cache on movi command

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On 24/07/2019 10:04, Xiangyou Xie wrote:
> It is not necessary to invalidate the lpi translation cache when the
> virtual machine executes the movi instruction to adjust the affinity of
> the interrupt. Irqbalance will adjust the interrupt affinity in a short
> period of time to achieve the purpose of interrupting load balancing,
> but this does not affect the contents of the lpi translation cache.

What does irqbalance have to do with it? We're dealing with the GIC
architecture here, not with userspace.

If the guest issues a MOVI command to a RD where GICR_CTLR.EnableLPI is
0, and that we use an existing cached translation, we are going to make
the interrupt pending for that RD. This is direct violation of the
architecture, which says:

"LPI support is disabled. Any doorbell interrupt generated as a result
of a write to a virtual LPI register must be discarded, and any ITS
translation requests or commands involving LPIs in this Redistributor
are ignored."

So the interrupt cannot be made pending. No IFs, no BUTs. If you really
want to optimize it, check that the target RD is actually enabled and
only invalidate in this particular case.

Your guest would have to have a rate of MOVI that is comparable to that
of the interrupts for it to show on any radar though...

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...
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