Re: [PATCH v2] KVM: arm64: Skip more of the SError vaxorcism

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Hi Robin,

On 10/06/2019 17:38, Robin Murphy wrote:
> On 10/06/2019 17:30, James Morse wrote:
>> During __guest_exit() we need to consume any SError left pending by the
>> guest so it doesn't contaminate the host. With v8.2 we use the
>> ESB-instruction. For systems without v8.2, we use dsb+isb and unmask
>> SError. We do this on every guest exit.
>>
>> Use the same dsb+isr_el1 trick, this lets us know if an SError is pending
>> after the dsb, allowing us to skip the isb and self-synchronising PSTATE
>> write if its not.
>>
>> This means SError remains masked during KVM's world-switch, so any SError
>> that occurs during this time is reported by the host, instead of causing
>> a hyp-panic.
>>
>> If you give gcc likely()/unlikely() hints in an if() condition, it
>> shuffles the generated assembly so that the likely case is immediately
>> after the branch. Lets do the same here.

>> diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S
>> index a5a4254314a1..c2de1a1faaf4 100644
>> --- a/arch/arm64/kvm/hyp/entry.S
>> +++ b/arch/arm64/kvm/hyp/entry.S
>> @@ -161,18 +161,24 @@ alternative_if ARM64_HAS_RAS_EXTN
>>       orr    x0, x0, #(1<<ARM_EXIT_WITH_SERROR_BIT)
>>   1:    ret
>>   alternative_else
>> -    // If we have a pending asynchronous abort, now is the
>> -    // time to find out. From your VAXorcist book, page 666:
>> +    dsb    sy        // Synchronize against in-flight ld/st
>> +    mrs    x2, isr_el1
>> +    and    x2, x2, #(1<<8)    // ISR_EL1.A
>> +    cbnz    x2, 2f

> It doesn't appear that anyone cares much about x2 containing the masked value after
> returning, so is this just a needlessly long-form TBNZ?

Yes, I'd make a third-rate compiler.

(I almost certainly had 'cmp x2, xzr' in there at some point!)


Thanks,

James
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