ARMv8 provides support for chained PMU counters, where an event type
of 0x001E is set for odd-numbered counters, the event counter will
increment by one for each overflow of the preceding even-numbered
counter. Let's emulate this in KVM by creating a 64 bit perf counter
when a user chains two emulated counters together.
Testing has been performed by hard-coding hwc->sample_period in
__hw_perf_event_init (arm_pmu.c) to a small value, this results in
regular overflows (for non sampling events). The following command
was then used to measure chained and non-chained instruction cycles:
perf stat -e armv8_pmuv3/long=1,inst_retired/u \
-e armv8_pmuv3/long=0,inst_retired/u dd if=/dev/zero bs=1M \
count=10 | gzip > /dev/null
The reported values were identical (and for non-chained was in the
same ballpark when running on a kernel without this patchset). Debug
was added to verify that the guest received overflow interrupts for
the chain counter.
The test was also repeated using the cycle counter (cycle:u).
For chained events we only support generating an overflow interrupt
on the high counter. We use the attributes of the low counter to
determine the attributes of the perf event.
Changes since v9:
- Ensure only 32 bits of cycle counter is returned when !PMCR_LC
- Add a helper to test for 64 bit counters (e.g. long cycle counter)
- Rename kvm_pmu_pmc_is_high_counter to kvm_pmu_idx_is_high_counter to
reflect arguments passed to it
Changes since v8:
- Correctly calculate the sample_period for the cycle counter
- Drop "arm64: perf: extract chain helper into header" patch
Changes since v7:
- Remove pmc->bitmask
- Remove a couple of instances of using kvm_pmu_get_canonical_pmc
when not needed
- Remove unused perf_event variable
Changes since v6:
- Drop kvm_pmu_{get,set}_perf_event
- Avoid duplicate work by using kvm_pmu_get_pair_counter_value inside
kvm_pmu_stop_counter
- Use GENMASK for 64bit mask
Changes since v5:
- Use kvm_pmu_pmc_is_high_counter instead of open coding
- Rename kvm_pmu_event_is_chained to kvm_pmu_idx_has_chain_evtype
- Use kvm_pmu_get_canonical_pmc only where needed and reintroduce
the kvm_pmu_{set, get}_perf_event functions
- Drop masking of counter in kvm_pmu_get_pair_counter_value
- Only initialise pmc once in kvm_pmu_create_perf_event and other
minor changes.
Changes since v4:
- Track pairs of chained counters with a bitmap instead of using
a struct kvm_pmc_pair.
- Rebase onto kvmarm/queue
Changes since v3:
- Simplify approach by not creating events lazily and by introducing
a struct kvm_pmc_pair to represent the relationship between
adjacent counters.
- Rebase onto v5.1-rc2
Changes since v2:
- Rebased onto v5.0-rc7
- Add check for cycle counter in correct patch
- Minor style, naming and comment changes
- Extract armv8pmu_evtype_is_chain from arch/arm64/kernel/perf_event.c
into a common header that KVM can use
Changes since v1:
- Rename kvm_pmu_{enable,disable}_counter to reflect that they can
operate on multiple counters at once and use these functions where
possible
- Fix bugs with overflow handing, kvm_pmu_get_counter_value did not
take into consideration the perf counter value overflowing the low
counter
- Ensure PMCCFILTR_EL0 is used when operating on the cycle counter
- Rename kvm_pmu_reenable_enabled_{pair, single} and similar
- Always create perf event disabled to simplify logic elsewhere
- Move PMCNTENSET_EL0 test to kvm_pmu_enable_counter_mask
Andrew Murray (5):
KVM: arm/arm64: rename kvm_pmu_{enable/disable}_counter functions
KVM: arm/arm64: extract duplicated code to own function
KVM: arm/arm64: re-create event when setting counter value
KVM: arm/arm64: remove pmc->bitmask
KVM: arm/arm64: support chained PMU counters
arch/arm64/kvm/sys_regs.c | 4 +-
include/kvm/arm_pmu.h | 11 +-
virt/kvm/arm/pmu.c | 350 ++++++++++++++++++++++++++++++--------
3 files changed, 291 insertions(+), 74 deletions(-)
--
2.21.0
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