On Fri, 22 Feb 2019 16:23:24 +0800 Leo Yan <leo.yan at linaro.org> wrote: > The function kvm_vgic_inject_irq() is not only used by PPIs but also can > be used to inject interrupt for SPIs; this patch improves comment for > argument @cpuid to reflect support SPIs as well. > > Signed-off-by: Leo Yan <leo.yan at linaro.org> > --- > virt/kvm/arm/vgic/vgic.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c > index 7cfdfbc910e0..79fe64c15051 100644 > --- a/virt/kvm/arm/vgic/vgic.c > +++ b/virt/kvm/arm/vgic/vgic.c > @@ -394,7 +394,7 @@ bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq, > /** > * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic > * @kvm: The VM structure pointer > - * @cpuid: The CPU for PPIs > + * @cpuid: The CPU for PPIs and SPIs > * @intid: The INTID to inject a new state to. > * @level: Edge-triggered: true: to trigger the interrupt > * false: to ignore the call What does the CPU mean for SPIs? By definition, the routing of an SPI is defined by the distributor configuration. And what about LPIs? SGIs? I'm afraid you've misunderstood what cpuid is for. M. -- Without deviation from the norm, progress is not possible.
