ARM64_CORE_REG() is currently only used to generate the KVM
register IDs for registers that happen to be 64 bits in size, so
KVM_REG_SIZE_U64 is hard-coded in the definition.
To enable this macro to generate correct encodings for the FPSIMD
registers too (which are a mix of 128-bit and 32-bit registers),
this patch extends the macro to encode the correct size for each
class of register in KVM_REG_ARM_CORE.
The approach is crude, but because the KVM_REG_ARM_CORE ID
arrangement is ABI, it's not expected to evolve.
Signed-off-by: Dave Martin <Dave.Martin@xxxxxxx>
---
arm/aarch64/kvm-cpu.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arm/aarch64/kvm-cpu.c b/arm/aarch64/kvm-cpu.c
index 1b29374..0aaefaf 100644
--- a/arm/aarch64/kvm-cpu.c
+++ b/arm/aarch64/kvm-cpu.c
@@ -12,8 +12,21 @@
#define SCTLR_EL1_E0E_MASK (1 << 24)
#define SCTLR_EL1_EE_MASK (1 << 25)
-#define ARM64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
- KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
+static __u64 __core_reg_id(__u64 offset)
+{
+ __u64 id = KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset;
+
+ if (offset < KVM_REG_ARM_CORE_REG(fp_regs))
+ id |= KVM_REG_SIZE_U64;
+ else if (offset < KVM_REG_ARM_CORE_REG(fp_regs.fpsr))
+ id |= KVM_REG_SIZE_U128;
+ else
+ id |= KVM_REG_SIZE_U32;
+
+ return id;
+}
+
+#define ARM64_CORE_REG(x) __core_reg_id(KVM_REG_ARM_CORE_REG(x))
unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu)
{
--
2.1.4
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