On Sun, Mar 11, 2018 at 12:49:56PM +0000, Marc Zyngier wrote:
> On guest exit, and when using GICv2 on GICv3, we use a dsb(st) to
> force synchronization between the memory-mapped guest view and
> the system-register view that the hypervisor uses.
>
> This is incorrect, as the spec calls out the need for "a DSB whose
> required access type is both loads and stores with any Shareability
> attribute", while we're only synchronizing stores.
>
> We also lack an isb after the dsb to ensure that the latter has
> actually been executed before we start reading stuff from the sysregs.
>
> The fix is pretty easy: turn dsb(st) into dsb(sy), and slap an isb()
> just after.
>
> Cc: stable@xxxxxxxxxxxxxxx
> Fixes: f68d2b1b73cc ("arm64: KVM: Implement vgic-v3 save/restore")
> Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx>
> Signed-off-by: Marc Zyngier <marc.zyngier@xxxxxxx>
Acked-by: Christoffer Dall <cdall@xxxxxxxxxx>
> ---
> virt/kvm/arm/hyp/vgic-v3-sr.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c
> index f5c3d6d7019e..b89ce5432214 100644
> --- a/virt/kvm/arm/hyp/vgic-v3-sr.c
> +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c
> @@ -215,7 +215,8 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
> * are now visible to the system register interface.
> */
> if (!cpu_if->vgic_sre) {
> - dsb(st);
> + dsb(sy);
> + isb();
> cpu_if->vgic_vmcr = read_gicreg(ICH_VMCR_EL2);
> }
>
> --
> 2.14.2
>
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