On 06/03/18 16:56, Peter Maydell wrote: > On 6 March 2018 at 16:43, Marc Zyngier <marc.zyngier@xxxxxxx> wrote: >> On 06/03/18 16:26, Peter Maydell wrote: >>> +/* For KVM currently all guest registers are nonsecure, but we reserve a bit >>> + * in the encoding to distinguish secure from nonsecure for banked registers. >>> + */ >> >> Nit: >> >> /* >> * This is the canonical comment style. >> */ >> >> It might be worth pointing out in the comment that this only applies to >> AArch32 system registers that are banked by security. > > Sure. How about > > /* > * For KVM currently all guest registers are nonsecure, but we reserve a bit > * in the encoding to distinguish secure from nonsecure for AArch32 system > * registers that are banked by security. This is 1 for the secure banked > * register, and 0 for the nonsecure banked register or if the register is > * not banked by security. > */ > > ? Looks good to me. > >>> +#define KVM_REG_ARM_SECURE_MASK 0x0000000010000000 >>> +#define KVM_REG_ARM_SECURE_SHIFT 28 >>> >>> #define ARM_CP15_REG_SHIFT_MASK(x,n) \ >>> (((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK) >>> >> >> Don't you also need to define it on the arm64 side? > > I don't think so, because AArch64 registers aren't security banked > (except for some GICv3 ones, which aren't set via GET/SET_ONE_REG.) > Or is there a case I'm missing? There is still the case of AArch32 guests on arm64, for which you'd need to replicate the change to arch/arm64/include/uapi/asm/kvm.h. The two architectures have different userspace APIs. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
