On Wed, Oct 11, 2017 at 03:28:19PM +0100, Catalin Marinas wrote: > On Tue, Oct 10, 2017 at 07:38:24PM +0100, Dave P Martin wrote: > > Manipulating the SVE architectural state, including the vector and > > predicate registers, first-fault register and the vector length, > > requires the use of dedicated instructions added by SVE. > > > > This patch adds suitable assembly functions for saving and > > restoring the SVE registers and querying the vector length. > > Setting of the vector length is done as part of register restore. > > > > Since people building kernels may not all get an SVE-enabled > > toolchain for a while, this patch uses macros that generate > > explicit opcodes in place of assembler mnemonics. > > > > Signed-off-by: Dave Martin <Dave.Martin@xxxxxxx> > > Reviewed-by: Alex Bennée <alex.bennee@xxxxxxxxxx> > > Acked-by: Catalin Marinas <catalin.marinas@xxxxxxx> > > (not adding reviewed-by as I haven't checked the instruction encodings, > I just trust you to be correct ;)) Agreed, I am sometimes correct. Better, Alex _did_ check the encodings against binutils :) _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
