On 05/06/17 11:30, wanghaibin wrote: > At present, take GICv3 as as an example, our implementation is that, the operation > of the recovery ICH_HCR register is prior to the recovery of ICH_LRn registers in vgic > state restore. Thus, the ICH_LRn registers are 0, and if ICH_HCR.UIE is configured to 1, > a large number of unnecessary maintenance interrupts will be triggered. Is that a theoretical problem? Or something you've actually observed? At the point where we restore the vgic state, interrupts are disabled. And by the time we enter the guest, we fully expect the HW to be in a stable state, and no spurious interrupt would be delivered. I also dispute the "large number of unnecessary maintenance interrupts". This large number is at most *one*. Or am I missing something obvious? Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
