Hello
I am reading the arm8a book. According to the documentation the output address of each level 3 entry in TTBRx_EL1points to an address in the physical memory.
By looking in the mmu tab in the DS5 studio I can see the TTBRs tables. I am reading the arm8a book. According to the documentation the output address of each level 3 entry in TTBRx_EL1points to an address in the physical memory.
What I do not understand is why while I have 2GB of RAM in the FVP ( /proc/meminfo ) some page entries ( level 3 ) of the ttbr points to memory above 4GB; for instance:
Output address NP:0xF794D000
_______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm