Hello! > Actually, I seem to have been just incredibly unlucky with my test > cycles, because I eventually reproduced the bug without your patches. Or lucky, without "un" :) > I'm going to take this version of the series because that's what I > reviewed and tested. It's OK, as i wrote, v5 is no different from v4 actually, just 0001 bisected. And making it was useful because it helped me to make sure once again that i haven't messed anything up. > Sorry for the noise. It's OK, thank you very much for putting efforts into testing and cooperation. You know, since we are talking about this... This definitely has something to do with the reset, and... Looks like nobody resets vGIC/vTimer, unless the userland does it explicitly by resetting every register by hand. I know, there is no global "reset" function for the whole VM. But, at least we have reset ioctl for vCPU. What if we hook up vGIC/vTimer there, and reset at least per-CPU objects (CPU interface + redist + timer) at this point? P.S. I've seen your PULL, and it is missing a little thing that could be good for 4.4 too. I've fixed one more bug recently, it reproduces on CP15-timer-less boards like Exynos: http://www.spinics.net/lists/kvm/msg122746.html. Just to make sure that you don't miss it. Kind regards, Pavel Fedin Expert Engineer Samsung Electronics Research center Russia _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
