On 13 October 2015 at 13:02, Pavel Fedin <p.fedin@xxxxxxxxxxx> wrote: > Hello! > >> b) Once you're in the device state saving (a above) you must not change guest RAM, >> because at that point the migration code won't send any new changes across >> to the destination. So any sync's you're going to do have to happen before/at >> the time we stop the CPU and do the final RAM sync. On the plus side, when >> you're loading the device state in (a) you can be sure the RAM contents are there. > > This is good. I think, in this case i can teach the kernel (here we talk about accelerated > in-kernel irqchip implementation) to flush ITS caches when a CPU is stopped. This will do the job. Our idea at the discussion at Connect was to have an ioctl to request a flush, rather than to do it automatically when a CPU is stopped (you probably don't want to flush when only one CPU in an SMP system is stopped, for instance). But we wanted to get the basic no-ITS ABI sorted out and agreed first, so those details aren't in the patch Christoffer sent out the other day. It will probably be more efficient if we agree on the ABI details here before doing the implementation rather than afterwards. thanks -- PMM _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
