On 30/08/15 14:54, Christoffer Dall wrote: > The GICD_ICFGR allows the bits for the SGIs and PPIs to be read only. > We currently simulate this behavior by writing a hardcoded value to the > register for the SGIs and PPIs on every write of these bits to the > register (ignoring what the guest actually wrote), and by writing the > same value as the reset value to the register. > > This is a bit counter-intuitive, as the register is RO for these bits, > and we can just implement it that way, allowing us to control the value > of the bits purely in the reset code. > > Signed-off-by: Christoffer Dall <christoffer.dall@xxxxxxxxxx> Reviewed-by: Marc Zyngier <marc.zyngier@xxxxxxx> M. -- Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
