On 06/16/15 01:46, Marc Zyngier wrote: > On Tue, 16 Jun 2015 02:34:23 +0100 > Vikram Sethi <vikrams@xxxxxxxxxxxxxx> wrote: > > Hi Vikram, > >> Hi Marc, Christoffer, Catalin, Will, >> >> I'm seeing an issue with KVM HCPTR (cp15) writes on guest entry/exit >> on one of Qualcomm's CPU cores in AArch32 host and AArch32 guest >> mode. Our CPU architects believe that HCPTR cp15 writes are context >> changing and require an isb. With an isb in set_hcptr macro in >> arch/arm/kvm/interrupts_head.S I am able to boot the Aarch32 guest, >> but without it, I see strange crashes to hyp_undef or hyp_pabt. > [...] > > Can you look at the following patch (queued for 4.2)? > > http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/330955.html > > Please let me know if this solves the issue you are seeing. Don't we have the same issue the first time guest touches FP and traps i.e in switch_to_guest_vfp where we turn on floating point access in HCPTR and immediately access FPEXC in store_vfp_state without a isb? My first attempt at a fix was similar to yours (add isb only in kvm_vcpu_return path after hcptr update) and while that helped the guest boot further, I still got hyp prefetch abort (hyp_pabt) later in the guest boot, until I also added isbs after the other HCPTR writes. > > Thanks, > > M. -- Vikram Sethi Qualcomm Technologies Inc, on behalf of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
