On Fri, Apr 17, 2015 at 11:29 AM, Christoffer Dall <christoffer.dall@xxxxxxxxxx> wrote: > On Thu, Apr 16, 2015 at 06:02:27PM +0200, Paolo Bonzini wrote: >> >> >> On 16/04/2015 17:54, Jérémy Fangučde wrote: >> > The guest kernel driver of the lsi device fails to enable it correctly >> > with a cache error: >> > [...] >> > sym53c8xx 0000:00:01.0: enabling device (0100 -> 0103) >> > sym0: <895a> rev 0x0 at pci 0000:00:01.0 irq 54 >> > sym0: No NVRAM, ID 7, Fast-40, LVD, parity checking >> > CACHE TEST FAILED: chip wrote 2, host read 1. >> > sym0: CACHE INCORRECTLY CONFIGURED. >> > sym0: giving up ... >> > [...] >> >> Note that this is just a failure in the driver self-test. It has >> nothing to do with the processor cache (though there are other problems >> with PCI and the processor cache in KVM mode). >> >> Do not use this QEMU device. The emulation is incomplete and it's slow. >> Use virtio-scsi or megasas instead. Still, I'm not sure that would >> work with KVM; as far as I know, most work on the ARM PCI host bridge >> was done using UEFI firmware. >> > I've been running a number of tests lately using virtio-net-pci and > virtio-blk-pci on XGene at it works like a charm. It should be noted that all these devices work fine on x86 with KVM enabled. Of course, not all PCI devices are affected, e.g. virtio-* devices work fine for me also. However, should this failure be considered normal with KVM on ARM, while it works on x86? For instance, let's take the use case where there is no virtio alternative: USB devices (passthrough or emulated) attached to a PCI USB controller, how is this supposed to work with KVM on ARM? The only way to make usb-ehci working that I am aware, is with this cache hack. _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
