We shouldn't assume we can set tcr_el1.ips to 42 bits. Set it based on what we read from id_aa64mmfr0_el1. Didn't see a problem, but might as well be correct. Signed-off-by: Andrew Jones <drjones@xxxxxxxxxx> --- arm/cstart64.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arm/cstart64.S b/arm/cstart64.S index 5151f4c77d745..9047e7ef14646 100644 --- a/arm/cstart64.S +++ b/arm/cstart64.S @@ -92,7 +92,7 @@ asm_mmu_enable: TCR_TG0_64K | TCR_TG1_64K | \ TCR_IRGN_WBWA | TCR_ORGN_WBWA | \ TCR_SHARED - mov x2, #3 // 011 is 42 bits + mrs x2, id_aa64mmfr0_el1 bfi x1, x2, #32, #3 msr tcr_el1, x1 -- 1.9.3 _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
